Timeline for How does this serial input DAC work?
Current License: CC BY-SA 4.0
5 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Nov 12, 2018 at 12:32 | vote | accept | Mah | ||
| Nov 12, 2018 at 11:57 | history | edited | JRE | CC BY-SA 4.0 |
added 13 characters in body
|
| Nov 12, 2018 at 10:38 | answer | added | user136077 | timeline score: 0 | |
| Nov 12, 2018 at 9:48 | comment | added | Andy aka | The last 16 bits sent prior to the left/right IO line changing forms the basis of the analogue output. The timing diagram shows MSb and LSb. | |
| Nov 12, 2018 at 9:40 | history | asked | Mah | CC BY-SA 4.0 |