My task is to fill in this table the output Q by analysing following circuit
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
Edit: My question is different from the possible duplicate because I should work here with the previous Q (previous stored data).
My task is to fill in this table the output Q by analysing following circuit
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
My task is to fill in this table the output Q by analysing following circuit
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
Edit: My question is different from the possible duplicate because I should work here with the previous Q (previous stored data).
My task is to create a statefill in this table for a SR-Latch which is build with NAND-Gates.the output Q by analysing following circuit
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
My task is to create a state table for a SR-Latch which is build with NAND-Gates.
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
My task is to fill in this table the output Q by analysing following circuit
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
My task is to create a state table for a SR-Latch which is build with NAND-Gates.
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
My task is to create a state table for a SR-Latch which is build with NAND-Gates.
My suggestion would be:
Would that idea be right?
My task is to create a state table for a SR-Latch which is build with NAND-Gates.
My suggestion would be:
Would that idea be right?
in the digital electronics means: S=1 => Q=1 and R=1 => Q=0
