Timeline for Driving Parallel Mosfets
Current License: CC BY-SA 4.0
20 events
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Jun 11, 2020 at 15:10 | history | edited | CommunityBot |
Commonmark migration
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Aug 12, 2019 at 19:29 | comment | added | Vikas Kumar | @rdtsc What about using two IR2110 to driver them all, HIP4082 output goes into both IR2110s. Is it a good choice? | |
Aug 11, 2019 at 17:08 | comment | added | rdtsc |
Total 10 Fets are to be driven in each cycle(5 lower ones and 5 opposite upper ones) - So wait, are you saying that one HIP4082 is driving multiple MOSFETs in parallel? Each gate capacitance acts like a dead short at t=0 and on each transition, so 10x one gate capacitance will behave like 1 MOSFET with 10x the gate capacitance, likely slowing the edges significantly. Use more HIP4082's and ensure they have adequate bypass capacitance so that all gates transition as quickly as possible.
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Aug 10, 2019 at 21:55 | comment | added | Drew | @VikasKumar It will probably be specified somewhere in the gate driver datasheet. The purpose is peak current limiting; and damping of ringing as DKNguyen said. | |
Aug 10, 2019 at 15:38 | comment | added | Voltage Spike♦ | @vikas the other way is with a hand calculation, and that's hard | |
Aug 10, 2019 at 6:44 | comment | added | Vikas Kumar | @VoltageSpike Thanks but I am no good with simulation. | |
Aug 10, 2019 at 6:40 | comment | added | Vikas Kumar | @Drew What is absolute minimum resistance in this case? I have no idea. | |
Aug 10, 2019 at 6:38 | comment | added | Vikas Kumar | @rdtsc Thats why I am asking. | |
Aug 10, 2019 at 6:36 | comment | added | Vikas Kumar | @DKNguyen Total 10 Fets are to be drived in each cycle(5 lower ones and 5 opposite upper ones). Each fet has gate resistor of 110 ohm total. So 10 resistors of 110ohm in parallel means 11 ohm of total resistance for the driver IC. Max voltage for driving is 11-12V. That gives more than 1A possible current from driver. Am I right? | |
Aug 9, 2019 at 22:51 | comment | added | Drew | I would build a prototype and test it. Start with a low load current and work your way up. As HIP mentioned you will probably see improvements by reducing that gate drive resistor to the absolute minimum. You can also try different gate drivers or reduce the switching frequency. | |
Aug 9, 2019 at 19:20 | comment | added | rdtsc |
Single pulldown resistor for each 5 mosfets(100k) - The HIP4082 does not mention any base resistors, nor pull-downs.
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Aug 9, 2019 at 19:12 | comment | added | DKNguyen | 110ohms it too high to switch one 150nC MOSFET at 26kHz at 1.25A, let alone five. The resistor need only be just high to dampen oscillations. | |
Aug 9, 2019 at 19:11 | comment | added | Voltage Spike♦ | Mosfets are for turning on and off, if the voltage is in between, then the mosfet will dissipate significant current as heat. If they are paralleled this might be acceptable, simulating in a SPICE package is probably the easiest thing to do to find out the thermal numbers | |
Aug 9, 2019 at 19:09 | history | edited | Vikas Kumar | CC BY-SA 4.0 |
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Aug 9, 2019 at 19:05 | comment | added | Vikas Kumar | I just want to know if they will blow up at 200A (100A average for each group of 5 fets) because of insufficiant gate drive and consequently overheating. Thats why I am asking for correct gate resistor value for each fet. | |
Aug 9, 2019 at 19:00 | comment | added | Vikas Kumar | @Drew Yes, spwm. | |
Aug 9, 2019 at 18:45 | comment | added | Drew | @DKNguyen He's probably synthesizing a "pure sinewave" using pwm. | |
Aug 9, 2019 at 18:37 | comment | added | DKNguyen | When you say "switching a transformer to get a pure sine wave output" that raises some red flags for me. Alternatively, in another interpretation of your post, it sounds like you want to run the MOSFETs as a linear devices which is oxymoronic because you also say H-bridge. If you gave us a schematic and more info, then I would not need to do all this guessing. | |
Aug 9, 2019 at 18:29 | history | edited | Marcus Müller | CC BY-SA 4.0 |
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Aug 9, 2019 at 18:20 | history | asked | Vikas Kumar | CC BY-SA 4.0 |