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Jan 31, 2020 at 20:21 history edited Jess CC BY-SA 4.0
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Jan 30, 2020 at 18:17 vote accept Jess
Jan 30, 2020 at 13:01 answer added Andy aka timeline score: 3
Jan 30, 2020 at 12:59 comment added Bimpelrekkie You appear to have drawn your circuit in LTspice, have you simulated it as well? In the real world your NMOS might be damaged by voltage spikes that are not suppressed by diodes (which are present in TI's schematic). In your schematic L2 and M2 will resonate after the slopes of the pulse. That resonance isn't damped like in TI's schematic.
Jan 30, 2020 at 12:45 history asked Jess CC BY-SA 4.0