Timeline for PCB 6-layer stackup problem
Current License: CC BY-SA 4.0
23 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Mar 25, 2021 at 14:57 | comment | added | Oli | Thanks for pointing it out, I will make sure that cores are not copper. Yes, there are no buried vias no blind vias and the minimum drilling diametere is 0.2mm | |
| Mar 25, 2021 at 14:53 | comment | added | bobflux | That's an important question, PCBs with copper cores are much more expensive than without, so there better be a good reason to have them. Also will there be special requirements for drilling vias? | |
| Mar 25, 2021 at 14:44 | comment | added | Oli | @bobflux I think I can change it so that it's not copper anymore which was my original assumption. Also I can't connect or use the copper cores so I'm not really sure why they are doing it. | |
| Mar 25, 2021 at 14:41 | comment | added | bobflux | That changes the situation quite a bit because if there is a slab of copper between your signals and your ground plane, then the signals will be referenced to the slab of copper and not really to the ground plane... | |
| Mar 25, 2021 at 14:33 | comment | added | Oli | @bobflux I believe so; The stackup properties is not chosen by me since the manufacturer only offers this one for six layer PCBs. | |
| Mar 25, 2021 at 14:30 | comment | added | bobflux | So if the copper cores count as layers, that's a bit like a 8 layer board? But L2/L3, and L4/L5 have copper core sandwiched between them, so they'll have pretty high capacitance to this copper, right? | |
| Mar 25, 2021 at 14:25 | comment | added | Oli | @bobflux Sorry for the confusion; Yes I am using copper cores for inner layers | |
| Mar 25, 2021 at 14:22 | comment | added | bobflux | You included the column with copper cores in the stackup, which makes me wonder if you are using copper cores or not. Can you clarify? | |
| Mar 25, 2021 at 14:08 | history | edited | winny | CC BY-SA 4.0 |
edited body
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| Mar 25, 2021 at 14:05 | vote | accept | Oli | ||
| Mar 25, 2021 at 14:05 | vote | accept | Oli | ||
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| Mar 25, 2021 at 14:05 | vote | accept | Oli | ||
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| Mar 25, 2021 at 14:04 | vote | accept | Oli | ||
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| Mar 25, 2021 at 14:04 | vote | accept | Oli | ||
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| Mar 25, 2021 at 13:57 | answer | added | D.A.S. | timeline score: 4 | |
| Mar 25, 2021 at 13:54 | answer | added | Enrico Migliore | timeline score: 1 | |
| Mar 25, 2021 at 13:48 | comment | added | Oli | @jwh20 I used to do it as well until a year ago I read couple of papers talking about how bad it could be and it's best to avoid it. | |
| Mar 25, 2021 at 13:44 | comment | added | Oli | @Andyaka I have started couple years back and have designed handful of professional PCBs, so I'm not an expert but I'm tiring to get there. | |
| Mar 25, 2021 at 13:41 | comment | added | Oli | @JonRB Thanks, I have already done that. | |
| Mar 25, 2021 at 13:27 | comment | added | jwh20 | PCB designers route signals on power and ground layers all the time. The key is understanding what you're doing and ensuring that signal integrity is maintained. | |
| Mar 25, 2021 at 13:26 | comment | added | user16222 | if you need to cut the plane, track it around the edge to ensure a continous gnd plane | |
| Mar 25, 2021 at 13:22 | comment | added | Andy aka | If you take care it should not be a problem. How experienced are you are PCB layout? | |
| Mar 25, 2021 at 13:12 | history | asked | Oli | CC BY-SA 4.0 |