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Jun 2, 2021 at 6:49 comment added Ali Lightwala I believe voltage sources are in parallel. I don't know how i should edit and draw the pictorial representation and show it to you.@MituRaj
Jun 1, 2021 at 18:58 comment added Mitu Raj How are the two voltage sources parallel and violate KVL? They are in series in the loop with two pull-up resistors and also negligible internal resistances of the sources. @Ali
Jun 1, 2021 at 14:46 history edited JRE CC BY-SA 4.0
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Jun 1, 2021 at 14:45 answer added TonyM timeline score: 3
Jun 1, 2021 at 14:43 comment added Ali Lightwala Am thinking if we apply kvl in the loop considering the open drain mosfet is off, so both the voltage source 1.8V will be acting in parallel and solving the kvl it doest hold good(kvl). Also in theory we learnt that voltage source should not be in prallel.kindly correct me.@DKNguyen @TonyM
Jun 1, 2021 at 14:39 comment added Ali Lightwala It is 10k @TonyM
Jun 1, 2021 at 14:38 comment added TonyM At first glance, it's likely to be fine. But what's the resistor value? You just need to be sure that the drivers can sink the combined pull-up current, which they almost certainly will be able to with typical board values.
Jun 1, 2021 at 14:37 comment added DKNguyen Parallel resistors so it behaves as one stronger pull-up, which may or may not be a problem.
Jun 1, 2021 at 14:32 history asked Ali Lightwala CC BY-SA 4.0