Timeline for Is the L298N H-bridge in FPGA (Intel DE0-Nano-SoC) compatible?
Current License: CC BY-SA 4.0
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| Jan 10 at 10:07 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Sep 9, 2023 at 7:04 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| May 10, 2023 at 13:03 | history | bumped | CommunityBot | This question has answers that may be good or bad; the system has marked it active so that they can be reviewed. | |
| Jun 19, 2022 at 11:00 | history | edited | toolic |
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| Feb 14, 2022 at 8:42 | history | edited | winny | CC BY-SA 4.0 |
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| Feb 14, 2022 at 8:38 | answer | added | Vlad | timeline score: 1 | |
| Feb 14, 2022 at 3:08 | history | edited | Ham | CC BY-SA 4.0 |
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| Feb 13, 2022 at 9:32 | comment | added | Kartman | In the link you provided, there is no mention of a L298. The board does use the L9958 which is a far superior device to the L298. I'd suggest you read the datasheet - there's plenty of information on what pin does what. It looks like this chip can accept 3V3 logic, so that should directly interface with the FPGA. There's the issue of SPI which is used to configure and monitor the chip. That's a bit more work on the FPGA. | |
| Feb 13, 2022 at 6:00 | comment | added | Syed | Usually you need a buffer to isolate your digital circuits from the motor driver board. If you already have a PWM available on a pin, then what else are you looking for? Please clarify. | |
| S Feb 13, 2022 at 5:26 | review | First questions | |||
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| S Feb 13, 2022 at 5:26 | history | asked | Ham | CC BY-SA 4.0 |