Timeline for supplying logic 1 or 0 to logic gates & pull-up/down resistor values [closed]
Current License: CC BY-SA 4.0
9 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jun 28, 2022 at 17:52 | history | closed |
Andy aka ocrdu Null♦ |
Needs more focus | |
| Jun 18, 2022 at 13:42 | review | Close votes | |||
| Jun 28, 2022 at 17:52 | |||||
| Jun 18, 2022 at 9:58 | answer | added | RYR051 | timeline score: 1 | |
| Jun 18, 2022 at 7:54 | comment | added | eaterbugs | I don't have a specific value in mind. But my reasoning is why have .5mA draw if we can get just 5uA being drawn(with 1MOhms). I am looking for the biggest resistor value that I can use here which has the smallest current draw without radically redesigning the circuit. Unless I am missing something. | |
| Jun 18, 2022 at 6:36 | comment | added | Bruce Abbott | "I want to have minimal current draw (when the switch is ON for logic '1') through the pull down resistor." - define 'minimal'. | |
| Jun 18, 2022 at 4:44 | history | edited | eaterbugs | CC BY-SA 4.0 |
added 148 characters in body
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| Jun 18, 2022 at 4:37 | comment | added | eaterbugs | Yes, now that you mention it. It is always 1. Oops. I can just supply 'B' through either using second DIP switch and separate pulldown resistor. OR maybe use an invertor on 'A' to generate 'B' . | |
| Jun 18, 2022 at 3:56 | comment | added | jsotola |
B is always high in your diagram ... the switch has no effect on its voltage level
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| Jun 18, 2022 at 3:22 | history | asked | eaterbugs | CC BY-SA 4.0 |