# supplying logic 1 or 0 to logic gates & pull-up/down resistor values [closed]

I need to supply logic 1 or 0 (selected by a DIP switch) to NAND gates. Input 'A' & 'B' are inverted to each other. My Question: 1: Is the below circuit okay or its better to use inverter IC on A to supply B?

2: Is there any difference in using pull-up vs pull-down resistor in this case?

3: what can the max R1 value be? I want to have minimal current draw (when the switch is ON for logic '1') through the pull down resistor.So I should use the highest resistor value ?I know R1 is determined by the type of NAND chip (CMOS /TTL), so next question which chip should I use? My application will have regulated 5V supply and won't be >1KHz operating freq.Just need low power consumption. Is the selected 74HC132 okay?

Sorry for the basic question but I am just trying to understand the basics to actually implement my design from proteus simulator to PCB.

EDIT: just found out that Input 'B' will always have 5 V. So I will need another DIP swicth-pulldown resistor combo OR invert 'A' to supply 'B'.

• B is always high in your diagram ... the switch has no effect on its voltage level Jun 18 at 3:56
• Yes, now that you mention it. It is always 1. Oops. I can just supply 'B' through either using second DIP switch and separate pulldown resistor. OR maybe use an invertor on 'A' to generate 'B' . Jun 18 at 4:37
• "I want to have minimal current draw (when the switch is ON for logic '1') through the pull down resistor." - define 'minimal'. Jun 18 at 6:36
• I don't have a specific value in mind. But my reasoning is why have .5mA draw if we can get just 5uA being drawn(with 1MOhms). I am looking for the biggest resistor value that I can use here which has the smallest current draw without radically redesigning the circuit. Unless I am missing something. Jun 18 at 7:54