Timeline for Which is a better way of discharging the capacitor through the transistor?
Current License: CC BY-SA 4.0
9 events
| when toggle format | what | by | license | comment | |
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| Nov 18, 2022 at 15:46 | comment | added | brhans | You could remove R9 entirely and Q3 would still discharge the cap, because in your current circuit the primary discharge path is through Q3's b-e junction and R5. | |
| Nov 18, 2022 at 13:08 | vote | accept | Hasman404 | ||
| Nov 18, 2022 at 12:58 | answer | added | user173271 | timeline score: 1 | |
| Nov 18, 2022 at 12:35 | comment | added | Dave Tweed | Whatever. In any case, the Q3/R9 combination doesn't work well because there's a second discharge path through the BE junction of Q3 and R5. The M17/R18 solution avoids this problem, but it operates M17 in "source follower" mode, in which it can't discharge the capacitor below its own threshold voltage. It would be better to use an NMOS with its source tied to ground, and an inverted drive signal for the gate. | |
| Nov 18, 2022 at 12:26 | comment | added | Hasman404 | Whilst the suggestion is good, i am intending on using a buffer IC which has its output push pull tied (as shown in the additional image) and so can't make the circuit like that. | |
| Nov 18, 2022 at 12:25 | comment | added | Hasman404 | @DaveTweed thanks for pointing that out. I forgot to mirror it when i copied the circuit for this question. I have fixed the said error on the schematic | |
| Nov 18, 2022 at 12:24 | history | edited | Hasman404 | CC BY-SA 4.0 |
Schematic corrected
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| Nov 18, 2022 at 12:14 | comment | added | Dave Tweed | First, Q1 is upside-down. You're forcing it into "reverse active" mode. Second, why not just split the connection between M2 and M3, leaving R7 connected to M3. Then, connect R9 between C1 and M2 and forget about Q3 altogether. | |
| Nov 18, 2022 at 11:45 | history | asked | Hasman404 | CC BY-SA 4.0 |