Timeline for Why does the FET input stage of op-amps still have an input current limit?
Current License: CC BY-SA 4.0
11 events
| when toggle format | what | by | license | comment | |
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| S Feb 26, 2023 at 13:49 | history | edited | ocrdu | CC BY-SA 4.0 |
referenced section
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| S Feb 26, 2023 at 13:49 | history | suggested | Sascha | CC BY-SA 4.0 |
referenced section
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| Feb 26, 2023 at 12:55 | comment | added | Sascha | Had a very funny awakening about this when the current trough the opamps (INA111) suddenly started to heat my cryostat..... | |
| Feb 26, 2023 at 12:53 | review | Suggested edits | |||
| S Feb 26, 2023 at 13:49 | |||||
| Feb 25, 2023 at 15:38 | vote | accept | curlywei | ||
| Feb 25, 2023 at 15:38 | comment | added | curlywei | So is the "Latch up" of the MOSFET also caused by the ultra-absolute maximum voltage( or current) value? | |
| Feb 25, 2023 at 15:36 | comment | added | curlywei | Thanks @Justme's reply. Over absolute max. rate would damage other component, not MOSFET/JFET input pair. | |
| Feb 25, 2023 at 14:01 | comment | added | Tim Williams | There may also be input protection diodes (as in shunting in parallel between inputs). I forget if I've ever seen those on FET or MOS types, but it's something to be very careful about anyway; the inputs may even be rated for full voltage because they put in current-limiting resistors to these diodes, making the amp perfectly useless as a comparator (and questionable as a limiter) while still claiming usefully low input bias current. | |
| Feb 25, 2023 at 10:41 | history | edited | Justme | CC BY-SA 4.0 |
added 97 characters in body
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| Feb 25, 2023 at 10:27 | comment | added | Designalog | True that. Too early in the morning for me. I will correct my answer. | |
| Feb 25, 2023 at 10:18 | history | answered | Justme | CC BY-SA 4.0 |