That error commonly occurs when you have a combinational loop in your code. For example, look at the costp signal in this code:

always @(*)begin
case(current_state)
IDLE:begin
   i<=0;
    costp<=0;
    j<=0;
    queue[0]<={source_r,source_c,costp};

always @* is used to infer combinational logic. You make an assignment to costp on the 5th line, then "read from" costp on the last line. This can cause the simulator to trigger the always block multiple times when costp changes.

You do the same thing with the queue signal.

You likely want to infer sequential logic for some of that, for example using:

always @(posedge clk) begin

Again, your code might be simpler if you split up that big always block into more blocks. For example, keep the logic that assigns to next_state, but consider making assignments to other signals in other blocks.

That error commonly occurs when you have a combinational loop in your code. For example, look at the costp signal in this code:

always @(*)begin
case(current_state)
IDLE:begin
   i<=0;
    costp<=0;
    j<=0;
    queue[0]<={source_r,source_c,costp};

always @* is used to infer combinational logic. You make an assignment to costp on the 5th line, then "read from" costp on the last line. This can cause the simulator to trigger the always block multiple times when costp changes.

You do the same thing with the queue signal.

You likely want to infer sequential logic for some of that, for example using:

always @(posedge clk) begin

Again, your code might be simpler if you split up that big always block into more blocks. For example, keep the logic that assigns to next_state, but consider making assignments to other signals in other blocks.

always @* begin
    case (current_state)
        IDLE            : next_state = ROW_COL_SELEC;
        ROW_COL_SELEC   : next_state = ((row==dest_r) && (col==dest_c)) ? FINAL_RESULT : LEFT_CHECKER;
        LEFT_CHECKER    : next_state = UP_CHECKER;
        UP_CHECKER      : next_state = DOWN_CHECKER;
        DOWN_CHECKER    : next_state = RIGHT_CHECKER;
        RIGHT_CHECKER   : next_state = ENQUEU_VALID;
        ENQUEU_VALID    : next_state = DEQUEUE_FIRST;
        DEQUEUE_FIRST   : next_state = ROW_COL_SELEC;
        FINAL_RESULT    : next_state = (rst) ? IDLE : FINAL_RESULT;
    endcase
end

That error commonly occurs when you have a combinational loop in your code. For example, look at the costp signal in this code:

always @(*)begin
case(current_state)
IDLE:begin
   i<=0;
    costp<=0;
    j<=0;
    queue[0]<={source_r,source_c,costp};

always @* is used to infer combinational logic. You make an assignment to costp on the 5th line, then "read from" costp on the last line. This can cause the simulator to trigger the always block multiple times when costp changes.

You do the same thing with the queue signal.

You likely want to infer sequential logic for some of that, for example using:

always @(posedge clk) begin

That error commonly occurs when you have a combinational loop in your code. For example, look at the costp signal in this code:

always @(*)begin
case(current_state)
IDLE:begin
   i<=0;
    costp<=0;
    j<=0;
    queue[0]<={source_r,source_c,costp};

always @* is used to infer combinational logic. You make an assignment to costp on the 5th line, then "read from" costp on the last line. This can cause the simulator to trigger the always block multiple times when costp changes.

You do the same thing with the queue signal.

You likely want to infer sequential logic for some of that, for example using:

always @(posedge clk) begin

Again, your code might be simpler if you split up that big always block into more blocks. For example, keep the logic that assigns to next_state, but consider making assignments to other signals in other blocks.