Skip to main content

Timeline for MOSFET gate driver scheme

Current License: CC BY-SA 4.0

8 events
when toggle format what by license comment
Oct 22, 2023 at 3:37 comment added TQQQ Martin yes, but it is not the only thing happening. When the switching node rings, the ringing gets to the gate as it comes at fairly high frequency, and then several things happen. Sometimes Mosfet goes off for a short while, other times the driver gets, destroyed (still not quite sure how).
Oct 21, 2023 at 22:06 comment added Martin Why is Miller capacitance "a mess"? gate resistance together with Cgd is doing just what are you saying -- controlled dV/dt at the drain. Can you be more specific why simple gate resistance (eventually with additional discrete Cgd) is not what you want?
Oct 21, 2023 at 19:23 comment added TQQQ @TimWilliams initial issue was with dV/dt. Capacitor in parallel with the gate is one option, I'll try to find something that work.
Oct 21, 2023 at 18:37 comment added Tim Williams Is your problem related to drain dV/dt or dI/dt? If so, how about some R+C impedance across D-G, or R||L (often a ferrite bead) in series with the source?
Oct 21, 2023 at 18:18 comment added TQQQ Thank you. A simultaneous turn on of course is not possible, but i do want short and predictable events.
Oct 21, 2023 at 18:12 comment added Rohat Kılıç You can add a capacitor across the gate and the source to slow down the turn-on. If you end up with a too large capacitance then you can place a smaller one across the gate and drain instead (it'll be multiplied by the transconductance and reflect to gate-source). For turning on multiple MOSFETs at the same time, it's not possible because of practical differences coming from manufacturing. Even if you force one to track another for turn-on, thresholds and Q-t behaviours will be different. So the thing depends more on the delay that is acceptable for you.
Oct 21, 2023 at 17:48 history edited JRE CC BY-SA 4.0
added 28 characters in body
Oct 21, 2023 at 17:39 history asked TQQQ CC BY-SA 4.0