What are the typical limitations for capacitors integrated into silicon chip?

Question

This question is a bit premature as I don't have any intention to create any silicon chips right away. But I have an idea of an integrated circuit which depends on what I will be able to squeeze into one.

And the main thing I have doubts about is a HV capacitor. My simulation shows that I will need to have 350 (or 400 even better - 230 VAC + 10-15%) Volts with 100 pF capacitance.

Unfortunately I don't know which limitations are applied to capacitors integrated into silicon chips. Does anybody knows?

Answer 1

On chip capacitors take a lot of chip area making them expensive. I'm currently working on a process where they can make metal capacitors of 2 femto Farad per square micrometer. So a 100 pF capacitor would have take up an area of 50000 sq um so 500 x 100 um.

But these capacitors can handle only up to 10 Volts or so, nowhere near your 350-400 V requirement.

Maybe there are specialist high-voltage processes in which high voltage capacitors can be made but I doubt that. Edit: Doubt taken away, there are, see comments.

For 350-400 V you need a strong and/or large dielectric which can withstand the fieldstrength. This is not easy to fit in a small size (like an IC).

Answer 2

If you want to connect 230 VAC to an IC, you generally need capacitors rated at 1 kV DC and 6 kV transiently for safety reasons (think lightning strikes). These are possible on ICs, but practically limited to 1 pF.

For 'only' 400 V, you can build a denser capacitor using the capacitance between adjacent fingers of metal (like two combs intertwined). These are called fringing capacitors, but still are generally limited to a few pF for cost (area) reasons.

In addition, to use these you need components (transistors, diodes etc.) able to handle these voltages. Most IC processes cannot.