# Are there any benefits to amplify the signal for this case?

A force transducer together with its amplifier designed for a full scale load such that it has -5V to +5V range as output. But it is only used with loads outputting -200mV to +200mV. A data acquisition ADC is sampling the output voltages.

The ADC input range is -10 to +10V and its resolution is 16 bit.

Are there any benefits to amplify the transducer output in this case? Could you give me a practical example.

(I guess SNR will not improve because noise will be amplified as well)

• I guess SNR will not improve because noise will be amplified as well That is only true if the noise of the transducer is dominant. But what if the (quantization) noise of the ADC is dominant ? That can be the case if the ADC's input signal is quite small. – Bimpelrekkie Feb 15 at 10:40
• Is that the only possible benefit?Would matching the input to the ADC range have any benefit? I just could not explain why. – atmnt Feb 15 at 12:13
• "Matching the input to the ADC range" is exactly what Bimpelrekkie recommends in the quantization-dominated regime; maybe read up on ADCs and quantization! – Marcus Müller Feb 15 at 12:39
• I just could not explain why. Simple! Just think about an extreme case: 16-bit ADC with +/- 10 V input range but my signal is only +/- 0.1 V. that +/- 10 V = 20 V is divided in 20 / (2^16) = 305 uV steps. So +/- 0.1 V = 0.2 V is divided in 0.2 V / 305 uV = 655 steps. 16 bit means 2^16 = 65536 steps. So I'm using about 1% of the steps. If I would properly use a 10 bit ADC (instead of 16 bit) I could get a better result than using the 16 bit ADC. An ADC is only used to the max if you really use almost all the bits! – Bimpelrekkie Feb 15 at 13:12
• IF you need the high resolution, you can either amplify to fit the full-scale ADC input range. Or you can buy a higher-resolution ADC. You still have the responsibility to keep electric fields and magnetic fields and Ground trash out of the ADC input. – analogsystemsrf Feb 15 at 14:17