What I want is to open the MOSFET once the current passing through it exceeds 3A. A fuse is already being used, but more protection is needed.

There are some options to do it. I could measure the voltage in the MOSFET since its resistance does not change so much (it is around 130mohms). That could be done using a subtractor circuit and reading it with the ADC of a microcontroller (STM32F030R8).

Also it could be used two ADC to measure the voltage directly, just passing by a voltage divider. But it is better to avoid this last option since the uC is almost at its full capacity.

I could also use a gate driver for the MOSFET, but I am not really sure which do use, since I have never worked with one before. Do I need to use one specifically for the p-channel?

If you have a different idea about how to solve the problem, please share with me. But keep in mind I need to solve this using the option with the best cost-benefit.


simulate this circuit – Schematic created using CircuitLab

  • 1
    \$\begingroup\$ Can you measure the ground side? If not, an opamp is indeed the usual solution. Often it is built into another IC sold as a high-side current monitor, but your voltage range may be a stretch for those. Given the magnitude of current, you may actually be able to get away with using a resistive divider to tap each side of a sense resistor, something you would not be able to do in lower current cases. \$\endgroup\$ – Chris Stratton Mar 28 at 17:22

Here is the basic concept:


simulate this circuit – Schematic created using CircuitLab

The voltage across R4,

\$V_X = I_{OUT} R_4 (Rs/ R_1)\$

You would pick R3 and D1 (or use a shunt regulator like TLV431) to get a suitable regulated voltage for the op-amp.

Rs is picked to provide the desired voltage drop. R1 establishes the current ratio R4 establishes the output voltage and should be low enough impedance that your ADC is happy.

You'll have to protect the input against overvoltage by clamping it. Worst case it could be Vin/R1 assuming nothing fails.

The op-amp must be rail-to-rail input, and many of those op=amps are happy with 5V supplies. Series resistors to the inputs may be a good idea for protection against shorts on out. You can also put a resistor in series with the collector of Q1 provided it doesn't drop too much voltage at minimum Vin and maximum current. That would allow clamping safely for the MCU regardless of what happens to the current sense circuit.

The main sources of error are resistor tolerances including connection resistances to R2 and op-amp offset voltage. The error due to the latter is a 'zero' offset of Vos/R2. So a 100uV offset with a 10m\$\Omega\$ resistor represents an error of +/-10mA in the measured current. Since the circuit only provides an output for positive currents, it may take 10mA before it starts to read more than zero, or it may read 10mA with no current flowing. For that reason, you want an op-amp with relatively low offset voltage, perhaps a chopper stabilized type.

You can use a Kelvin connection to R2 (four connections with the outer connections carrying the high current).

It's also possible to use a P-channel enhancement mode MOSFET instead of the BJT, but there is usually no significant advantage (there's a slight error from the base current in the circuit shown, but usually quite a bit less than the resistor tolerances).

  • \$\begingroup\$ Unless the circuit can shut off the FET in about 114uS (the thermal time constant of 100 micron of silicon (100 microns is usually the thickness of backgrinded silicon power devices), the FET will sacrifice itself due to overheating. \$\endgroup\$ – analogsystemsrf Mar 29 at 3:15
  • \$\begingroup\$ @analogsystemsrf Yes. OP could set up an unmaskable comparator interrupt, or use hardware, but polling is not going to do the trick. \$\endgroup\$ – Spehro Pefhany Mar 29 at 3:31
  • \$\begingroup\$ The TLV431 would appear to be a poor choice in this application as it would only permit a 6V op amp supply. Perhaps an ATL431 would be more appropriate. \$\endgroup\$ – Jack Creasey Mar 30 at 0:37
  • \$\begingroup\$ @JackCreasey Sure, nice part BTW, thanks for mentioning it, though most of the inexpensive zero-drift amplifiers can barely handle 5V. \$\endgroup\$ – Spehro Pefhany Mar 30 at 1:00
  • \$\begingroup\$ @SpehroPefhany. No problem, in addition the circuit you show has no reference against which the resolve the current so accuracy would be very poor. \$\endgroup\$ – Jack Creasey Mar 30 at 4:27

Measure the current that flows through the MOSFET from the input to the output.

The easiest/simplest and potentially cheapest way to provide an accurate measure is to use an isolated Hall Effect device such as the ACS712 (now replaced with the ACS723, but still readily available). It comes in several FSD levels, but the +/-5A should fit the need. These are available on Ebay for just a few $ as a complete module.
Since the SCS7xx has a good internal reference, the output voltage accurately reflects the current through the sense path at 400mV/A. Here there is a very low path resistance of typically 0.65 mOhms so the voltage drop is probably inconsequential.

You have not defined how you intend to handle the current limit of 3A.
Do you intend to:

  1. Limit the current to 3A, which would potentially require the series FET to dispate over 100W with the output shorted.
  2. Switch off the series FET is the current exceeds 3A. Here you need to store the overload state and provide either an MCU or manual reset.
  3. Provide a rollback of current after hitting 3S. For example you might roll back to 100mA which with a short circuit would hold in that condition. However it could be self resetting if designed to do so.

You give no idea the rate at which the current would rise under fault conditions. This makes a response by the MCU seem quite inappropriate. You'd have to either use an A/D to resolve the current, or a fixed threshold (I/O pin) but the MCU will be slooow to respond. Using a battery supply with considerable output capacitance you could easily trigger at 3A, but be breaking 30A or more by the time you respond.
That is why most overcurrent sensing and limiting is done in analog hardware.

Now to your suggested circuit. It will certainly not work as shown.
You included a resistive divider to feet the P-Chan gate, which is good, but the values are wrong. Most FETs have V(GS) limits around 10-12V, so you need to limit the voltage under all conditions to less than this limit. Your divider would result in almost 36V across the gate with your highest voltage applied.

I won't suggest a circuit until you decide what the response to overcurrent should be.


This may not be the way you want to go, but Analog Devices has a line of parts that act as electronic fuses. I've used the LTC4361 Surge stopper for this application https://www.analog.com/en/products/ltc4361.html It might be more than what you're looking for, but it has some nice features.


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