I am working on a project for which I need a stable crystal oscillator of 1 Hz. I am planning on using a 32.768 kHz quartz crystal and then convert it to 1 Hz by frequency divider circuit( CD4060 + Flipflop ). I need to reduce the phase jitter and shift of the clock. Can anyone suggest any circuit or resources on that.?
-
2\$\begingroup\$ You have some studying to do because you ask to improve the thermal stability which, if you do that, makes the frequency more stable over time and temperature. It will not help to improve phase jitter (phasenoise). Also your first step should be to access what you need. The jitter of a crystal clock should already be quite low (if not you might be doing things wrong), then state what you need and why you need an even lower jitter. So I think you need to learn what stability and jitter really mean. \$\endgroup\$– BimpelrekkieCommented Sep 28, 2020 at 9:57
-
3\$\begingroup\$ Also a CD4060 and flipflop will probably introduce more jitter than the crystal oscillator is introducing. \$\endgroup\$– BimpelrekkieCommented Sep 28, 2020 at 10:01
-
\$\begingroup\$ Per @Bimpelrekkie this is really two unrelated questions. How to improve thermal stability and how to improve phase characteristics. Depending upon what you are trying to achieve with your project you might want to accept a suitably engineering crystal oscillator solution that meets your needs and focus instead on the solution you want to provide. \$\endgroup\$– mhaselupCommented Sep 28, 2020 at 10:08
-
1\$\begingroup\$ @mhaselup The question is obviously asked by someone that "wants something" and just throws "a commonly used solution" at is in the hope that that will fix the "problem". 1) we do not know if there even is a problem, why is the jitter/stability not good enough? All modern watches use a 32 kHz crystal and there it is not an issue 2) temperature stabilizing a crystal is usually only needed in measurement equipment so explain why you need it, are you building a device for measurement? 3) if you're really concerned about clock jitter why use a CD4060, it has no specs for jitter. \$\endgroup\$– BimpelrekkieCommented Sep 28, 2020 at 10:19
-
4\$\begingroup\$ Does this answer your question: I want to design a precise digital clock. You appear to have gotten all the information you needed from answers and comments so what is the intent of this new question (given that jitter is unlikely to be an issue based on what you previously said). \$\endgroup\$– Andy akaCommented Sep 28, 2020 at 10:30
3 Answers
You can buy a part with the crystal contained within an oven for thermal stability. See https://en.wikipedia.org/wiki/Crystal_oven for more detail.
Put the crystal in an oven regulated to 80 centigrade. Crystals with ovens already exist for many years.
If you build a marginal XTAL oscillator, where the PI_network_and_XTAL feedforward and the amplifer/excess_phase_shift are barely satisfying Barkhausen's Criteria, AND there is lots of external interference with the basic oscillator loop, then jitter can be a problem.
Given
- Time Jitter = V_Noise / SlewRate
and the very slow SlewRate of 32,000Hz with +-1 volt oscillation amplitude, into the circuitry used to 'square up' the sin, into a logic_level signal, you can examine the jitter and predict the necessary "V_noise".