1
\$\begingroup\$

How would you solve this circuit with nodal analysis? I know it's the difficult route but it's a requirement. I understand that I need to create a super node that combines nodes a and b, and I have shown my equation below. However I am stuck with coming up with the second equation needed to solve the circuit.

My supernode equation:

$$\frac{V_a}{30} + \frac{V_B - 10}{15} + \frac{V_B}{10} = 2$$

enter image description here

For my second equation I tried a KVL in the middle loop but I get all the terms canceling out:

$$(0 - V_a) + 5 + (V_a - 5 - V_B) + (V_B - 10) + 10 = 0$$

where \$(0-V_a)\$ is the voltage across \$R_4\$, \$(V_a-5-V_B)\$ is the voltage across \$R_1\$ and \$(V_B-10)\$ is the voltage across \$R_2\$.

\$\endgroup\$
12
  • 1
    \$\begingroup\$ Explain why you want to go down the torturous route of solving with nodal analysis. Anyone sensible (thinking practicality) would simplify first. \$\endgroup\$
    – Andy aka
    Commented Dec 5, 2021 at 13:02
  • 3
    \$\begingroup\$ So, if you are required to solve it using nodal analysis, then why are you potentially cheating by asking here for a solution? I think you might need to try a little harder at this or maybe consult with Chegg. This site doesn't like to give out answers to questions like this unless there is significant effort shown on your part. \$\endgroup\$
    – Andy aka
    Commented Dec 5, 2021 at 13:07
  • 1
    \$\begingroup\$ We won't do your homework for you. You are right, if your instructor requires that you use nodal analysis then you must create a supernode. There is no point trying to use KVL, you won't get any marks for that. Read about supernodes and come back if you have a specific question. \$\endgroup\$ Commented Dec 5, 2021 at 13:12
  • 1
    \$\begingroup\$ In this case, you don't need to use a supernode. For example o for node Va we can write $$\frac{V_A}{30\Omega} + \frac{(V_A - 5V) - V_B}{25\Omega} = 2A$$ Do you see it? \$\endgroup\$
    – G36
    Commented Dec 5, 2021 at 13:25
  • 2
    \$\begingroup\$ I think the question has an attempt at a solution, this looks like a valid question to me and it's well documented \$\endgroup\$
    – Voltage Spike
    Commented Dec 6, 2021 at 4:01

3 Answers 3

3
\$\begingroup\$

I always suggest taking the time to re-draw any schematic you are given. Even when it looks good enough. (See Addendum below for more details.)

To emphasize, the very first thing I do before attempting to analyze a circuit is to redraw that circuit. The process of just doing it helps me think and gather up a few details that I may not notice so easily, just staring at someone's depiction. But I can often help the readability, too, which improves understanding and reduces chances for mistakes, later.

It takes lots of practice to accumulate a good sense about it. But that practice is well worth your time.

Here's my re-drawing:

schematic

simulate this circuit – Schematic created using CircuitLab

The upper right side uses a Norton conversion of \$V_1\$ and \$R_1\$ on the upper left side. But they are equivalent.

As shown, you could continue from the upper left side by converting \$V_2\$, \$R_2\$, and \$R_3\$ into yet another Thevenin equivalent. And you could even do that one more time (not shown.)

In other words, this circuit can be reduced to almost an almost trivial approach for solving \$V_{_\text{A}}\$.

But let's back off from that. You mentioned nodal analysis. So let's go back to the initial schematic and just solve it, as shown. No conversions. Just straight forward nodal analysis.

Using SymPy, which is free, we can do the following:

var('i1 v1 v2 r1 r2 r3 r4 va vb vc i1 iv1')
eq1 = Eq( va/r4 + iv1, i1 )                          # KCL for node VA
eq2 = Eq( vb/r1 + vb/r2 + vb/r3, vc/r1 + v2/r2 )     # KCL for node VB
eq3 = Eq( vc/r1, vb/r1 + iv1 )                       # KCL for node VC
eq4 = Eq( va, vc + v1 )                              # Fixed relation between VA and VC
ans = solve( [ eq1, eq2, eq3, eq4 ], [ va, vb, vc, iv1 ] )
for y in ans: y, ans[y].subs( { r1:25, r2:15, r3:10, r4:30, i1:2, v1:5, v2:10 } ).n()
(va, 34.9180327868852)
(vb, 9.01639344262295)
(vc, 29.9180327868852)
(iv1, 0.836065573770492)

Just as a double-check, we can use the lower right hand corner schematic and convert the remaining resistor divider into its Thevenin equivalent of \$V_{_\text{TH}}=\frac{270}{61}\:\text{V}\approx 4.426\:\text{V}\$ and \$R_{_\text{TH}}=\frac{930}{61}\:\Omega\approx 15.246\:\Omega\$. Pushing \$2\:\text{A}\$ through that Thevenin impedance means adding \$\approx 30.492\:\text{V}\$ to \$4.426\:\text{V}\$, or \$V_{_\text{A}}\approx 34.918\:\text{V}\$. And that matches the above computation for it, quite well.

Note that no "super node" was introduced here. The only addition is the current in \$V_1\$. (You can choose the direction, as you wish.)

If you examine my SymPy equations, you'll see that I've used a technique above that I've developed (and discuss in the KCL Addendum below) for quickly and accurately writing out the particular form of the above equations. The results are exactly the same as other forms. I just prefer these. I've found I make far fewer mistakes that way. But feel free to re-arrange the above equations into any form that feels more comfortable. They will be mathematically equivalent, as you'll see if you try it.


Redrawing Schematic Addendum

Rules to live by are:

  • Arrange the schematic so that conventional current appears to flow from the top towards the bottom of the schematic sheet. I like to imagine this as a kind of curtain (if you prefer a more static concept) or waterfall (if you prefer a more dynamic concept) of charges moving from the top edge down to the bottom edge. This is a kind of flow of energy that doesn't do any useful work by itself, but provides the environment for useful work to get done.
  • Arrange the schematic so that signals of interest flow from the left side of the schematic to the right side. Inputs will then generally be on the left, outputs generally will be on the right.
  • Do not "bus" power around. In short, if a lead of a component goes to ground or some other voltage rail, do not use a wire to connect it to other component leads that also go to the same rail/ground. Instead, simply show a node name like "Vcc" and stop. Busing power around on a schematic is almost guaranteed to make the schematic less understandable, not more. (There are times when professionals need to communicate something unique about a voltage rail bus to other professionals. So there are exceptions at times to this rule. But when trying to understand a confusing schematic, the situation isn't that one and such an argument "by professionals, to professionals" still fails here. So just don't do it.) This one takes a moment to grasp fully. There is a strong tendency to want to show all of the wires that are involved in soldering up a circuit. Resist that tendency. The idea here is that wires needed to make a circuit can be distracting. And while they may be needed to make the circuit work, they do NOT help you understand the circuit. In fact, they do the exact opposite. So remove such wires and just show connections to the rails and stop.
  • Try to organize the schematic around cohesion. It is almost always possible to "tease apart" a schematic so that there are knots of components that are tightly connected, each to another, separated then by only a few wires going to other knots. If you can find these, emphasize them by isolating the knots and focusing on drawing each one in some meaningful way, first. Don't even think about the whole schematic. Just focus on getting each cohesive section "looking right" by itself. Then add in the spare wiring or few components separating these "natural divisions" in the schematic. This will often tend to almost magically find distinct functions that are easier to understand, which then "communicate" with each other via relatively easier to understand connections between them.
  • You get to choose exactly one node and call it "ground." If the purpose of redrawing the schematic is for understanding it, then choose a node that helps achieve that. When signals are single-ended, they share a common node and you should select this common node as "ground." If the purpose is for analysis, then you can select this for the purpose of reducing the equation complexity. Often, this will mean the node that is "busiest" (has the most terminals attached to it.) Either way, make this choice wisely and it will help a great deal.

The above rules aren't hard and fast. But if you struggle to follow them, you'll find that it does help a lot.

You can read a snippet of my own education by those schematic draftsmen at Tektronix who trained me by reading here.


KCL Addendum

The KCL equations may appear to treat node voltages as if they don't have to be differences, but can be absolute values. However, that's not really the case here. In fact, I'm just using superposition (which is easily seen once you've really had the concepts deepened into you.) This is, in fact, the same technique used within Spice programs (those where I've directly looked over the code used to generate these.)

Perhaps the easiest way to imagine is that absolute voltage at a node spills away from that node through the available paths. But also that absolute voltages spill into that node from surrounding nodes through those same paths. So long as you treat them all as absolute values, the result is the application of a simple superposition concept that results in, effectively, the potential differences controlling the result.

You can test this, easily, by rearranging the resulting equation(s), moving the right side over to the left side and then combining terms. You'll then see the usual potential differences that you expect. So it really is the same result.

The reason I very much prefer this method is that it is simple to visualize and very difficult to make mistakes. You can easily orient yourself to a node and then work out the terms for out-flowing currents for the left side of the equation. Then all you have to do is position yourself at each surrounding node and work out the terms for in-flowing currents for the right side. It's almost impossible to screw that up.

Conversely, when you are instead struggling to work out the potential differences in your mind (using the more traditionally taught method) and just write those terms, you often find yourself not entirely sure if you have the sign right as you try and add them up, correctly. I find, time and time again that not only others wind up messing up somewhere and making an uncaught mistake.. but that I also make those mistakes, as well. Even with lots of experience, you just aren't 100% sure and you often find yourself double and triple checking your work, just in case.

That doesn't ever happen, once you start using the superposition method. It just works. It just works right. It just works right each and every time. I've never, not once, screwed up. (I make typos. But not sign errors.) It's too easy to use.

So voltage spills away from a node via available paths and voltage spills into a node from nearby nodes via the same available paths. The only caveat is that a current source or sink can only flow in, or flow out, but not both directions. It's one way. So it will either appear on the out-flowing side or on the in-flowing side -- but not both sides.

This also works perfectly well with capacitors and inductors. It does turn the equation into a differential/integral equation. But that's just a technicality. It's still correct.

\$\endgroup\$
1
\$\begingroup\$

First, I will present a method that uses Mathematica to solve this problem. I know that this approach is not 'smart' but this method will work all the time, even when the circuit is way complicated than this one. This makes my answer valuable in my opinion.

Well, we are trying to analyze the following circuit:

schematic

simulate this circuit – Schematic created using CircuitLab

When we use and apply KCL, we can write the following set of equations:

$$ \begin{cases} \text{I}_1=\text{I}_\text{a}+\text{I}_2\\ \\ \text{I}_3=\text{I}_2+\text{I}_4 \end{cases}\tag1 $$

When we use and apply Ohm's law, we can write the following set of equations:

$$ \begin{cases} \text{I}_1=\frac{\text{V}_1}{\text{R}_1}\\ \\ \text{I}_2=\frac{\text{V}_3-\text{V}_2}{\text{R}_2}\\ \\ \text{I}_3=\frac{\text{V}_\text{b}-\text{V}_3}{\text{R}_3}\\ \\ \text{I}_4=\frac{\text{V}_3}{\text{R}_4} \end{cases}\tag2 $$

And we also know that \$\text{V}_1-\text{V}_2=\text{V}_\text{a}\$.

We can use \$(2)\$ and \$\text{V}_1-\text{V}_2=\text{V}_\text{a}\$ in order to rewrite \$(1)\$:

$$ \begin{cases} \frac{\text{V}_1}{\text{R}_1}=\text{I}_\text{a}+\frac{\text{V}_3-\text{V}_2}{\text{R}_2}\\ \\ \frac{\text{V}_\text{b}-\text{V}_3}{\text{R}_3}=\frac{\text{V}_3-\text{V}_2}{\text{R}_2}+\frac{\text{V}_3}{\text{R}_4}\\ \\ \text{V}_1-\text{V}_2=\text{V}_\text{a} \end{cases}\tag3 $$

Now, we can set up a Mathematica-code to solve for all the voltages and currents:

In[1]:=FullSimplify[
 Solve[{I1 == Ia + I2, I3 == I2 + I4, I1 == V1/R1, I2 == (V3 - V2)/R2,
    I3 == (Vb - V3)/R3, I4 == V3/R4, V1 - V2 == Va}, {I1, I2, I3, I4, 
   V1, V2, V3}]]

Out[1]={{I1 -> (Ia R2 R3 + Ia (R2 + R3) R4 + R3 Va + 
    R4 (Va + Vb))/((R1 + R2) R3 + (R1 + R2 + R3) R4), 
  I2 -> (-Ia R1 (R3 + R4) + R3 Va + 
    R4 (Va + Vb))/((R1 + R2) R3 + (R1 + R2 + R3) R4), 
  I3 -> (-Ia R1 R4 + 
    R4 Va + (R1 + R2 + R4) Vb)/((R1 + R2) R3 + (R1 + R2 + R3) R4), 
  I4 -> (Ia R1 R3 - 
    R3 Va + (R1 + R2) Vb)/((R1 + R2) R3 + (R1 + R2 + R3) R4), 
  V1 -> (R1 (Ia R2 R3 + Ia (R2 + R3) R4 + R3 Va + 
      R4 (Va + Vb)))/((R1 + R2) R3 + (R1 + R2 + R3) R4), 
  V2 -> ((R3 R4 + R2 (R3 + R4)) (Ia R1 - Va) + 
    R1 R4 Vb)/((R1 + R2) R3 + (R1 + R2 + R3) R4), 
  V3 -> (R4 (Ia R1 R3 - 
      R3 Va + (R1 + R2) Vb))/((R1 + R2) R3 + (R1 + R2 + R3) R4)}}

Using your values we get:

In[2]:=Clear["Global`*"];
Ia = 2;
Va = 5;
Vb = 10;
R1 = 30;
R2 = 25;
R3 = 15;
R4 = 10;
FullSimplify[
 Solve[{I1 == Ia + I2, I3 == I2 + I4, I1 == V1/R1, I2 == (V3 - V2)/R2,
    I3 == (Vb - V3)/R3, I4 == V3/R4, V1 - V2 == Va}, {I1, I2, I3, I4, 
   V1, V2, V3}]]

Out[2]={{I1 -> 71/61, I2 -> -(51/61), I3 -> 4/61, I4 -> 55/61, V1 -> 2130/61,
   V2 -> 1825/61, V3 -> 550/61}}

In[3]:=N[%2]

Out[3]={{I1 -> 1.16393, I2 -> -0.836066, I3 -> 0.0655738, I4 -> 0.901639, 
  V1 -> 34.918, V2 -> 29.918, V3 -> 9.01639}}
\$\endgroup\$
2
  • \$\begingroup\$ Thanks so so much for the seriously well-motivated downvotes, I really really appreciate it. \$\endgroup\$ Commented Dec 5, 2021 at 14:05
  • \$\begingroup\$ I wonder why your answer has 0 net upvotes while jonk's has +2. \$\endgroup\$
    – alejnavab
    Commented Dec 7, 2021 at 17:12
0
\$\begingroup\$

There are many ways to solve such circuit with nodal analysis. The most important part (in terms of learning) is how to correctly formulate the equations; solving them can be done with a calculator, or with hand but that's just algebra. (Of course, we can also simulate the circuit, but then you're not learning how to formulate the equations.) So I'll show some ways to obtain the equations; solving them is up to you. The circuit is the following.

Figure 1

Figure 1. Image source: own.


Method 1: Applying source transformation

If you've already been taught about source transformations, and are allowed to use them in your circuit, then we can transform the 5-V source into a (5 V)/(25 Ω) = 1/5-A current source, with the reference direction pointing to the left. The resulting circuit diagram is the following. The arrowheads indicate the reference direction I've arbitrarily chosen for the currents to be used in KCL.

Figure 2

Figure 2. Circuit diagram for the first method. Image source: own.

Applying KCL at node a:

\$ + 2 \text{ A} - \dfrac{V_\text{a}}{30 \text{ } \Omega} + \dfrac{1}{5} \text{ A} - \dfrac{V_\text{a} - V_\text{b}}{25 \text{ } \Omega} = 0 \text{ A} \tag 1 \$

Applying KCL at node b:

\$ - \dfrac{1}{5} \text{ A} + \dfrac{V_\text{a} - V_\text{b}}{25 \text{ } \Omega} + \dfrac{10 \text{ V} - V_\text{b}}{15 \text{ } \Omega} - \dfrac{V_\text{b}}{10 \text{ } \Omega} = 0 \text{ A} \tag 2\$

Now you have two simultaneous linear algebraic equations (eqs. (1) and (2)) with two unknowns (\$V_\text{a}\$ and \$V_\text{b}\$), which you can thus solve. The result is shown next.

Figure 3

Figure 3. Solution for the first method. Image source: own.


Method 2: Working with the current through the 5-V source as an unknown

In this method, we simply work with the current through the 5-V source as an additional unknown. Let's call it the current \$I_0\$, with the reference direction pointing to the left. Also, instead of just considering junctions (i.e. nodes with three or more interconnections), we'll additionally consider the node between the 5-V source and the 25-Ω resistor; let's call it node c. This is shown in the following circuit diagram.

Figure 4

Figure 4. Circuit diagram for the second method. Image source: own.

Applying KCL at node a:

\$ + 2 \text{ A} - \dfrac{V_\text{a}}{30 \text{ } \Omega} + I_0 = 0 \text{ A} \tag 3 \$

Applying KCL at node b:

\$ -\dfrac{V_\text{b} - V_\text{c}}{25 \text{ } \Omega} + \dfrac{10 \text{ V} - V_\text{b}}{15 \text{ } \Omega} - \dfrac{V_\text{b}}{10 \text{ } \Omega} = 0 \text{ A} \tag 4\$

Applying KCL at node c:

\$ - I_0 + \dfrac{V_\text{b} - V_\text{c}}{25 \text{ } \Omega} = 0 \text{ A} \tag 5 \$

Since there's now another unknown, we need a new equation. That's the constraint or auxiliary equation, which we get by expressing the voltage of the 5-V source in terms of the nodal voltages of the nodes adjacent to such source. Applying KVL around the loop aca (or by simply looking at the circuit diagram, and the polarity of the 5-V source and the location of nodes a and c), we get the constraint/auxiliary equation to be:

\$ 5 \text{ V} = V_\text{a} - V_\text{c} \tag 6 \$

Now you have four equations (eqs. (3), (4), (5) and (6)) with four unknowns (\$V_\text{a}\$, \$V_\text{b}\$, \$V_\text{c}\$ and \$I_0\$). The result is shown next; notice it's the same as in the previous method.

Figure 5

Figure 5. Solution for the second method. Image source: own.


Method 3: Writing the current through the branch where the 5-V source is, in terms of nodal voltages

In case you didn't know, it's possible to write or express the current through a V-R branch (that is, a branch consisting of a voltage source in series with a resistor) in terms of the nodal voltages of the two terminals of such branch. The formula is easy to prove, though I won't do it in this answer. It's as follows, provided the reference direction of such current is such that it exits the voltage source through the positive reference terminal of the source:

\$ I = \dfrac{V_\text{leaving} - V_\text{entering} + V_\text{source}}{R} \tag 7 \$

Let's use this fact to formulate the equations. The circuit diagram is the following.

Figure 6

Figure 6. Circuit diagram for the third method. Image source: own.

Applying KCL at node a:

\$ + 2 \text{ A} - \dfrac{V_\text{a}}{30 \text{ } \Omega} + \dfrac{V_\text{b} - V_\text{a} + 5 \text{ V}}{25 \text{ } \Omega} = 0 \text{ A} \tag 8 \$

Applying KCL at node b:

\$ - \dfrac{V_\text{b} - V_\text{a} + 5 \text{ V}}{25 \text{ } \Omega} + \dfrac{10 \text{ V} - V_\text{b}}{15 \text{ } \Omega} - \dfrac{V_\text{b}}{10 \text{ } \Omega} = 0 \text{ A} \tag 9\$

Now you have two equations (eqs. (8) and (9)) with two unknowns (\$V_\text{a}\$ and \$V_\text{b}\$). The result is shown next; notice it's the same as in the previous methods.

Figure 7

Figure 7. Solution for the third method. Image source: own.


Method 4: Forming a supernode with nodes a and c

As you know, we form a supernode, which is really a closed boundary that includes the adjacent nodes of the voltage source between the two non-reference nodes. In your circuits, they're nodes a and c, since the 5-V source is connected between those nodes. The circuit diagram is the following.

Figure 8

Figure 8. Circuit diagram for the fourth method. Image source: own.

Applying KCL at supernode a-c:

\$ \underbrace{+ 2 \text{ A} - \dfrac{V_\text{a}}{30 \text{ } \Omega}}_{\text{node $a$}} \underbrace{+ \dfrac{V_\text{b} - V_\text{c}}{25 \text{ } \Omega}}_{\text{node $c$}} = 0 \text{ A} \tag {10} \$

Applying KCL at node b:

\$ -\dfrac{V_\text{b} - V_\text{c}}{25 \text{ } \Omega} + \dfrac{10 \text{ V} - V_\text{b}}{15 \text{ } \Omega} - \dfrac{V_\text{b}}{10 \text{ } \Omega} = 0 \text{ A} \tag {11}\$

We have two equations but three unknowns; we need an auxiliary/constraint equation, which is the one indicating the voltage of the 5-V source in terms of nodal voltages:

\$ 5 \text{ V} = V_\text{a} - V_\text{c} \tag {12} \$

Now you have three equations (eqs. (10), (11) and (12)) with three unknowns (\$V_\text{a}\$, \$V_\text{b}\$ and \$V_\text{c}\$). The result is shown next; notice it's the same as in the previous methods.

Figure 9

Figure 9. Solution for the fourth method. Image source: own.


As you can see, the difference between your and my application of the supernode is that you formed the supernode with nodes a and b (and c), while I formed it only with nodes a and c. In your case, you got correct the first equation, but failed to formulate the constraint/auxiliary equations.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.