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I am trying to run some 7 nm simulations with NGSPICE, and I would like to know if my results are believable or not. I am using the ASAP7 transistor model, which I have converted from HSPICE to NGSPICE. I am not interested in completely precise results - as NGSPICE cannot do noise anyways, but it would be good to know if the results are in the ballpark of the HSPICE results or not.

I used the following file (TT - typical/typical, slvt - because that is the standard VT):

https://github.com/The-OpenROAD-Project/asap7/blob/master/asap7PDK_r1p7/models/hspice/7nm_TT_160803.pm

I used NGSPICE-41, which seems to already include the compiled OSDI modules, so I did not need to download and use the OpenVAF compiler to get BSIMCMG_va.osdi unlike what the documentation says.

https://gigenet.dl.sourceforge.net/project/ngspice/ng-spice-rework/41/ngspice-41_64.7z

Also in spinit the below line was already commented out:

* unset osdi_enabled

When converting the slvt pmos and nmos models from that file, what needed is to specify TYPE=0/1 in NGSPICE, otherwise it does not work.

This is all what is needed to added BTW:

.model BSIMCMG_osdi_P BSIMCMG_va (
+ TYPE = 0

After conversion, running the simulation results in the following warnings:

  .model bsimcmg_osdi_n bsimcmg_va ( type=1 version=107 bulkmod=1 igcmod=1 ...
unrecognized parameter (version) - ignored
unrecognized parameter (coremod) - ignored
unrecognized parameter (capmod) - ignored
unrecognized parameter (nseg) - ignored
unrecognized parameter (etaqm) - ignored

I compared the values from 7nm_TT_160803.pm to the following file from ngspice-41_64.7z: ngspice-41_64\Spice64\examples\osdi\bsimcmg\Modelcards\modelcard.pmos

  1. version is completely understandable, as the models were made by different companies.
  2. coremod/capmod is understandable, they are missing from modelcard.pmos, and they are set to 0 anyways.
  3. nseg/etaqm can be found in both files with the same values, so why it has not been deleted from modelcard.pmos is a mistery, but whatever.

However, there are a lot of small and some big differences which I do not understand, and they might make the simulations completely different relative to HSPICE:

  1. small differences which might be because the node differences (ASAP7 right):
at=0.0008234 / at=0.001
cgdo=1e-10 / cgdo=1.6e-10
cgso=1e-10 / cgso=1.6e-10
dsub=0.5 / dsub=0.24
dvt0=0.05006 / dvt0=0.05
dvt1=0.4 / dvt1=0.36
eot=2.1e-9 / eot=1e-9
eta0=0.03952 / eta0=0.094
hfin=3e-8 / hfin=3.2e-8
igt=3.5 / igt=2.5
phig=4.678 / phig=4.9278
ptwg=6.322 / ptwg=25
ptwgt=0.0015 / ptwgt=0.004
rdsw=190.6 / rdsw=200
tgidl=-0.01 / tgidl=-0.007
u0=0.02935 / u0=0.0237
ua1=0.00134 / ua1=0.001032
vsat=48390 / vsat=60000
  1. small differences where ASAP7 uses 0, I guess they decided not to simulate these.
cfd=0.2e-10 / cfd=0
cfs=0.2e-10 / cfs=0
deltawcv=-1e-8 / deltawcv=0
dlc=-9.2e-9 / dlc=0
kt1=0.08387 / kt1=0
prt=0.002477 / prt=0
utl=0.001 / utl=0
  1. small differences where NGSPICE uses 0, maybe the OSDI module does not support them.
ucste=0 / ucste=-0.004775
ute=0 / ute=-1.2
xl=0 / xl=1e-9

So far so good, while I have no idea what these parameters above are, the differences do not seem that huge. But then what about the ones below?

  1. The difference is huge. Is it a problem?
deltavsat=11.56 / deltavsat=0.17
geomod=0 / geomod=1
  1. Only the OSDI in ASAP7 seems to need them, is it a problem?
- / fpitch=2.7e-8
- / l=2.1e-8
- / tfin=6.5e-9
- / toxg=1.8e-9
  1. Only the OSDI in NGSPICE seems to need them, is it a problem?
pclmcv=0.013 / -

Since I have know nothing about these parameters, any information would be good. Or if somebody would run the simulations in HSPICE would be fine as well.

"test1.sp" is a simulation of an inverter train. I ignore the first and last inverters, as the first is driven by a clock with arbitrary slew, and the last does not drive anything. At the 0.35 V half point, the delay is between 2-3 ps, which looks reasonable.

.include 'asap7_TT_slvt.sp'

.global vdd! gnd!

.SUBCKT inv in out
   Npmos  vdd! in out vdd! BSIMCMG_osdi_P
   Nnmos  gnd! in out gnd! BSIMCMG_osdi_N
.ENDS

Vvdd vdd! 0 dc=0.7
Vgnd gnd! 0 dc=0
Vin inv_in 0 pulse (0 0.7 20p 10p 10p 20p 500p)

Xinv1 inv_in inv_x1 inv
Xinv2 inv_x1 inv_out inv
Xinv3 inv_out inv_ignore inv

.tran 0.1p 100p

.control
    run
    set xbrushwidth=3
    plot inv_in inv_x1 inv_out
.endc

.end

"test2.sp" is the same simulations where every inverter drives for other inverters, but the output of 3 of the 4 are ignored. This creates slower transitions as expected. At the 0.35 V half point, the delay is between 6-7 ps, which looks reasonable but I am not a chip designer so who knows?

.include 'asap7_TT_slvt.sp'

.global vdd! gnd!

.SUBCKT inv in out
   Npmos  vdd! in out vdd! BSIMCMG_osdi_P
   Nnmos  gnd! in out gnd! BSIMCMG_osdi_N
   Npmos2  vdd! in out2 vdd! BSIMCMG_osdi_P
   Nnmos2  gnd! in out2 gnd! BSIMCMG_osdi_N
   Npmos3  vdd! in out3 vdd! BSIMCMG_osdi_P
   Nnmos3  gnd! in out3 gnd! BSIMCMG_osdi_N
   Npmos4  vdd! in out4 vdd! BSIMCMG_osdi_P
   Nnmos4  gnd! in out4 gnd! BSIMCMG_osdi_N
.ENDS

Vvdd vdd! 0 dc=0.7
Vgnd gnd! 0 dc=0
Vin inv_in 0 pulse (0 0.7 20p 10p 10p 20p 500p)

Xinv1 inv_in inv_x1 inv
Xinv2 inv_x1 inv_out inv
Xinv3 inv_out inv_ignore inv

.tran 0.1p 100p

.control
    run
    set xbrushwidth=3
    plot inv_in inv_x1 inv_out
.endc

.end

They both include the common file asap7_TT_slvt.sp:

**** copied from asap7\asap7PDK_r1p7\models\hspice\7nm_TT_160803.pm

** Hspice modelcard
.model BSIMCMG_osdi_P BSIMCMG_va (
+ TYPE = 0
* .model pmos_slvt pmos level = 72 
************************************************************
*                         general                          *
************************************************************
+version = 107             bulkmod = 1               igcmod  = 1               igbmod  = 0             
+gidlmod = 1               iimod   = 0               geomod  = 1               rdsmod  = 0             
+rgatemod= 0               rgeomod = 0               shmod   = 0               nqsmod  = 0             
+coremod = 0               cgeomod = 0               capmod  = 0               tnom    = 25            
+eot     = 1e-009          eotbox  = 1.4e-007        eotacc  = 3e-010          tfin    = 6.5e-009      
+toxp    = 2.1e-009        nbody   = 1e+022          phig    = 4.9278          epsrox  = 3.9           
+epsrsub = 11.9            easub   = 4.05            ni0sub  = 1.1e+016        bg0sub  = 1.17          
+nc0sub  = 2.86e+025       nsd     = 2e+026          ngate   = 0               nseg    = 5             
+l       = 2.1e-008        xl      = 1e-009          lint    = -2.5e-009       dlc     = 0             
+dlbin   = 0               hfin    = 3.2e-008        deltaw  = 0               deltawcv= 0             
+sdterm  = 0               epsrsp  = 3.9           
+toxg    = 1.8e-009
************************************************************
*                            dc                            *
************************************************************
+cit     = 0               cdsc    = 0.003469        cdscd   = 0.001486        dvt0    = 0.05          
+dvt1    = 0.36            phin    = 0.05            eta0    = 0.094           dsub    = 0.24          
+k1rsce  = 0               lpe0    = 0               dvtshift= 0               qmfactor= 0             
+etaqm   = 0.54            qm0     = 2.183e-012      pqm     = 0.66            u0      = 0.0237        
+etamob  = 4               up      = 0               ua      = 1.133           eu      = 0.05          
+ud      = 0.0105          ucs     = 0.2672          rdswmin = 0               rdsw    = 200           
+wr      = 1               rswmin  = 0               rdwmin  = 0               rshs    = 0             
+rshd    = 0               vsat    = 60000           deltavsat= 0.17            ksativ  = 1.592         
+mexp    = 2.491           ptwg    = 25              pclm    = 0.01            pclmg   = 1             
+pdibl1  = 800             pdibl2  = 0.005704        drout   = 4.97            pvag    = 200           
+fpitch  = 2.7e-008        rth0    = 0.15            cth0    = 1.243e-006      wth0    = 2.6e-007      
+lcdscd  = 0               lcdscdr = 0               lrdsw   = 1.3             lvsat   = 1441          
************************************************************
*                         leakage                          *
************************************************************
+aigc    = 0.007           bigc    = 0.0015          cigc    = 1               dlcigs  = 5e-009        
+dlcigd  = 5e-009          aigs    = 0.006           aigd    = 0.006           bigs    = 0.001944      
+bigd    = 0.001944        cigs    = 1               cigd    = 1               poxedge = 1.152         
+agidl   = 2e-012          agisl   = 2e-012          bgidl   = 1.5e+008        bgisl   = 1.5e+008      
+egidl   = 1.142           egisl   = 1.142         
************************************************************
*                            rf                            *
************************************************************
************************************************************
*                         junction                         *
************************************************************
************************************************************
*                       capacitance                        *
************************************************************
+cfs     = 0               cfd     = 0               cgso    = 1.6e-010        cgdo    = 1.6e-010      
+cgsl    = 0               cgdl    = 0               ckappas = 0.6             ckappad = 0.6           
+cgbo    = 0               cgbl    = 0             
************************************************************
*                       temperature                        *
************************************************************
+tbgasub = 0.000473        tbgbsub = 636             kt1     = 0               kt1l    = 0             
+ute     = -1.2            utl     = 0               ua1     = 0.001032        ud1     = 0             
+ucste   = -0.004775       at      = 0.001           ptwgt   = 0.004           tmexp   = 0             
+prt     = 0               tgidl   = -0.007          igt     = 2.5           
************************************************************
*                          noise                           *
************************************************************
**)

** Hspice modelcard
.model BSIMCMG_osdi_N BSIMCMG_va (
+ TYPE = 1
* .model nmos_slvt nmos level = 72 
************************************************************
*                         general                          *
************************************************************
+version = 107             bulkmod = 1               igcmod  = 1               igbmod  = 0             
+gidlmod = 1               iimod   = 0               geomod  = 1               rdsmod  = 0             
+rgatemod= 0               rgeomod = 0               shmod   = 0               nqsmod  = 0             
+coremod = 0               cgeomod = 0               capmod  = 0               tnom    = 25            
+eot     = 1e-009          eotbox  = 1.4e-007        eotacc  = 1e-010          tfin    = 6.5e-009      
+toxp    = 2.1e-009        nbody   = 1e+022          phig    = 4.2466          epsrox  = 3.9           
+epsrsub = 11.9            easub   = 4.05            ni0sub  = 1.1e+016        bg0sub  = 1.17          
+nc0sub  = 2.86e+025       nsd     = 2e+026          ngate   = 0               nseg    = 5             
+l       = 2.1e-008        xl      = 1e-009          lint    = -2e-009         dlc     = 0             
+dlbin   = 0               hfin    = 3.2e-008        deltaw  = 0               deltawcv= 0             
+sdterm  = 0               epsrsp  = 3.9           
+toxg    = 1.80e-009
************************************************************
*                            dc                            *
************************************************************
+cit     = 0               cdsc    = 0.01            cdscd   = 0.01            dvt0    = 0.05          
+dvt1    = 0.47            phin    = 0.05            eta0    = 0.07            dsub    = 0.35          
+k1rsce  = 0               lpe0    = 0               dvtshift= 0               qmfactor= 2.5           
+etaqm   = 0.54            qm0     = 0.001           pqm     = 0.66            u0      = 0.0303        
+etamob  = 2               up      = 0               ua      = 0.55            eu      = 1.2           
+ud      = 0               ucs     = 1               rdswmin = 0               rdsw    = 200           
+wr      = 1               rswmin  = 0               rdwmin  = 0               rshs    = 0             
+rshd    = 0               vsat    = 70000           deltavsat= 0.2             ksativ  = 2             
+mexp    = 4               ptwg    = 30              pclm    = 0.05            pclmg   = 0             
+pdibl1  = 0               pdibl2  = 0.002           drout   = 1               pvag    = 0             
+fpitch  = 2.7e-008        rth0    = 0.225           cth0    = 1.243e-006      wth0    = 2.6e-007      
+lcdscd  = 5e-005          lcdscdr = 5e-005          lrdsw   = 0.2             lvsat   = 0             
************************************************************
*                         leakage                          *
************************************************************
+aigc    = 0.014           bigc    = 0.005           cigc    = 0.25            dlcigs  = 1e-009        
+dlcigd  = 1e-009          aigs    = 0.0115          aigd    = 0.0115          bigs    = 0.00332       
+bigd    = 0.00332         cigs    = 0.35            cigd    = 0.35            poxedge = 1.1           
+agidl   = 1e-012          agisl   = 1e-012          bgidl   = 10000000        bgisl   = 10000000      
+egidl   = 0.35            egisl   = 0.35          
************************************************************
*                            rf                            *
************************************************************
************************************************************
*                         junction                         *
************************************************************
************************************************************
*                       capacitance                        *
************************************************************
+cfs     = 0               cfd     = 0               cgso    = 1.6e-010        cgdo    = 1.6e-010      
+cgsl    = 0               cgdl    = 0               ckappas = 0.6             ckappad = 0.6           
+cgbo    = 0               cgbl    = 0             
************************************************************
*                       temperature                        *
************************************************************
+tbgasub = 0.000473        tbgbsub = 636             kt1     = 0               kt1l    = 0             
+ute     = -0.7            utl     = 0               ua1     = 0.001032        ud1     = 0             
+ucste   = -0.004775       at      = 0.001           ptwgt   = 0.004           tmexp   = 0             
+prt     = 0               tgidl   = -0.007          igt     = 2.5           
************************************************************
*                          noise                           *
************************************************************
**)

Result of simulation - left 4 inv, right 1 inv

"from 7nm_TT_160803 pm.txt" and "from modelcard pmos.txt" are the parameters from the two different sources, sorted and converted to similar diffable formats. I have uploaded all the files here:

https://drive.google.com/file/d/11-vKHFhfnxR9_VJzYrE4iICk3xOMcqq7/view?usp=sharing

Does this simulation result in reasonable output? Or did I screw up something?

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2

1 Answer 1

3
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Ok, if anybody wants to do this, here is the 'solution'.

First, do not use NGSPICE if possible, because

  1. It crashes when using its graphing UI in case there are too many signals displayed.

  2. They do not seem to have a use case for including the BSIMCMG models. The transistor parameters are completely bogus - those are test parameters for the BSIMCMG model itself. But at least they modify the model to converge better, which is a plus - still useless though in my opinion.

Instead use Xyce (https://xyce.sandia.gov/), which is free but requires registration because of export restrictions or something. It includes the BSIMCMG model variant level 110, there are not many changes after that for finfets.

The transistor specification file (https://github.com/The-OpenROAD-Project/asap7/blob/master/asap7PDK_r1p7/models/hspice/7nm_TT_160803.pm) has to be slightly modified:

  1. Change 'level' from 72 to 110.

  2. Remove 'version', 'coremod' and 'capmod'.

I saved it as 'asap7_TT.sp', you have to do the same changes for SS and FF corners if needed.

** ASAP TT models v1.0 8/3/16

** Hspice modelcard
.model nmos_lvt nmos level = 110 
************************************************************
*                         general                          *
************************************************************
+                          bulkmod = 1               igcmod  = 1               igbmod  = 0             
+gidlmod = 1               iimod   = 0               geomod  = 1               rdsmod  = 0             
+rgatemod= 0               rgeomod = 0               shmod   = 0               nqsmod  = 0             
+                          cgeomod = 0                                         tnom    = 25            
+eot     = 1e-009          eotbox  = 1.4e-007        eotacc  = 1e-010          tfin    = 6.5e-009      
+toxp    = 2.1e-009        nbody   = 1e+022          phig    = 4.307           epsrox  = 3.9           
+epsrsub = 11.9            easub   = 4.05            ni0sub  = 1.1e+016        bg0sub  = 1.17          
+nc0sub  = 2.86e+025       nsd     = 2e+026          ngate   = 0               nseg    = 5             
+l       = 2.1e-008        xl      = 1e-009          lint    = -2e-009         dlc     = 0             
+dlbin   = 0               hfin    = 3.2e-008        deltaw  = 0               deltawcv= 0             
+sdterm  = 0               epsrsp  = 3.9           
+toxg    = 1.80e-009
...

The extracted ASAP7 library (https://github.com/The-OpenROAD-Project/asap7/blob/master/asap7sc7p5t_28/CDL/xAct3D_extracted/asap7sc7p5t_28_R.sp) has to be modified as well to be compatible with Xyce. Use the regex below to replace to nothing to delete the incompatible stuff (I used Visual Studio Code, do not remember if case sensitive must be on or off):

(W|\$\w+)=\d+(\.\d+|)(e[+-]\d+|)|\$layer=\w+

Here there are 4 versions, SRAM > R > L > SL, which are faster left to right, but also have around 10x higher leakage each step. I guess R might be Regular, and SL does not mean Standard, but instead SuperLow.

Keep in mind that there are differences between the SPICE dialects used by NGSPICE and Xyce:

  1. NGSPICE uses N for BSIMCMG transistors, while Xyce uses M. This is hard to spot...

  2. I might remember wrong but there seems to be some differences between lines starting with spaces, so do not indent your netlist. (I might remember wrong though, it was a long time ago...)

  3. Xyce supports only a single .tran line, and you can loop parameters by .step or similar - read the documentation.

  4. In Xyce you should use 0 as gnd. Defining a different gnd would slow down simulations. Vdd handling is slightly different as well.

  5. Parameter handling is much better in Xyce, you declare a parameter with .param, and then can use the same name in a .step or similar. Multiple .step directives run all combinations, the current params used for the running simulation can be read from the .res file, which is appended realtime.

You can do something like this (Note that FAxp33_ASAP7_6t_SL has a different order of nets, look out for this. Here we use asap7sc7p5t_28_R, but you might want define .subckt for all library blocks):

.param vcc=0.9
*.step vcc LIST 0.6 0.7 0.8 0.9
.tran 1p 400p
.global vdd!
Vvdd vdd! 0 dc {vcc}
...
.include 'asap7_TT.sp'
*.include 'asap7sc6t_26_SL_211010.sp'
*.include 'asap7sc7p5t_28_SL.sp'
*.include 'asap7sc7p5t_28_L.sp'
.include 'asap7sc7p5t_28_R.sp'
.subckt fa7 a b cin ncout nsout
*Xadd a 0 vdd! b cin ncout nsout FAxp33_ASAP7_6t_SL
*Xadd 0 vdd! a b cin ncout nsout FAx1_ASAP7_75t_SL
*Xadd 0 vdd! a b cin ncout nsout FAx1_ASAP7_75t_L
Xadd 0 vdd! a b cin ncout nsout FAx1_ASAP7_75t_R
.ends
...
Xadd1 a1 b1 cin0 ncout1 nsout1 fa7
...
.end

Now the problem with this approach what you will see, is that with the extracted parasitics the library blocks (like Full Adder) are 2-3x slower than when you only wire ideal transistors together with perfect zero length wires. While it is fine modeling those circuits, the wires connecting blocks are not extracted, and it does matter in this case. On the other hand, if you have software to extract those wires then you do not need this kind of simulation I guess...

ps: forgot to add plotting differences

You can plot with the below line:

.print tran FORMAT=GNUPLOT 
+V(a1in) 
+V(a0) V(b0) V(xfirst_stage_y:a0_n) V(xfirst_stage_y:b0_n) 
...

Then in gnuplot draw the plot like this:

set autoscale xy
set key autotitle columnheader
set grid
set xtics 10
set ytics 400
plot for [i=3:39] 'filename.sp.prn' using ($2*1e12):((column(i)-i)*400) with lines lw 1.5

The loop (plot for) in the last line will use y coordinates from column(i), while x coordinates will come from column(2), which is the $2: part. *1e12 will display picoseconds. (column(i)-i)*400 will plot different columns below each other - this expects 0..0.9 V values, otherwise the subgraphs will collide. lw 1.5 is the line weight, otherwise it is hard to see.

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3
  • 1
    \$\begingroup\$ Awesome. Thanks so much for posting back the information you’ve gathered. I eventually want to attempt porting over one of these advanced Verilog transistor models into QSPICE (which was released recently). \$\endgroup\$
    – Ste Kulov
    Sep 22, 2023 at 15:37
  • 1
    \$\begingroup\$ "It crashes when using its graphing UI in case there are too many signals displayed." Could you please provide an input file that leads to this crash? We then could have a look. \$\endgroup\$
    – Holger
    Nov 6, 2023 at 21:57
  • 1
    \$\begingroup\$ The model parameters provided with ngspice for the BSIM-CMG model are used to verify the model installation in ngspice. If you want to use the ASAP model parameters, you may have to edit them for ngspice (as you had to edit them for XYCE). ngspice does currently not offer the .step command, but you may define a control language script for running loops with varying parameters (see Tutorial: ngspice control language). \$\endgroup\$
    – Holger
    Nov 6, 2023 at 22:25

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