Flash memory storage and EEPROM both use floating gate transistors for storage of data. What differs between the two and why is Flash so much faster?
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8\$\begingroup\$ See also this question: Why would one still use normal EEPROM instead of flash?. \$\endgroup\$– Anindo GhoshCommented May 14, 2013 at 15:59
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5 Answers
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The first ROM devices had to have information placed in them via some mechanical, photolithographic, or other means (before integrated circuits, it was common to use a grid where diodes could be selectively installed or omitted). The first major improvement was a "fuse-PROM"--a chip containing a grid of fused diodes, and row-drive transistors that were sufficiently strong that selecting a row and forcing the state of the output one could blow the fuses on any diodes one didn't want. Although such chips were electrically writable, most of the devices in which they would be used did not have the powerful drive circuitry necessary to write to them. Instead, they would be written using a device called a "programmer", and then installed in the equipment that needed to be able to read them.
The next improvement was an implanted-charge memory device, which allowed charges to be electrically implanted but not removed. If such devices were packaged in UV-transparent packages (EPROM), they could be erased with about 5-30 minutes' exposure to ultraviolet light. This made it possible to reuse devices whose contents were found not to be of value (e.g. buggy or unfinished versions of software). Putting the same chips in an opaque package allowed them to be sold more inexpensively for end-user applications where it was unlikely anyone would want to erase and reuse them (OTPROM). A succeeding improvement made it possible to erase the devices electrically without the UV light (early EEPROM).
Early EEPROM devices could only be erased en masse, and programming required conditions very different from those associated with normal operation; consequently, as with PROM/EPROM devices, they were generally used in circuitry which could read but not write them. Later improvements to EEPROM made it possible to erase smaller regions, if not individual bytes, and also allowed them to be written by the same circuitry that used them. Nonetheless, the name did not change.
When a technology called "Flash ROM" came on the scene, it was pretty normal for EEPROM devices to allow individual bytes to be erased and rewritten within an application circuit. Flash ROM was in some sense a step back functionally since erasure could only take place in large chunks. Nonetheless, restricting erasure to large chunks made it possible to store information much more compactly than had been possible with EEPROM. Further, many flash devices have faster write cycles but slower erase cycles than would be typical of EEPROM devices (many EEPROM devices would take 1-10ms to write a byte, and 5-50ms to erase; flash devices would generally require less than 100us to write, but some required hundreds of milliseconds to erase).
I don't know that there's a clear dividing line between flash and EEPROM, since some devices that called themselves "flash" could be erased on a per-byte basis. Nonetheless, today's trend seems to be to use the term "EEPROM" for devices with per-byte erase capabilities and "flash" for devices which only support large-block erasure.
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2\$\begingroup\$ @Frankenstein: EEPROM circuit designs generally required devoting space to erase circuitry in the same layers of the chip as programming and read circuitry. While there are a variety of flash circuit designs, they generally avoid such a requirement. \$\endgroup\$– supercatCommented Apr 25, 2016 at 14:13
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2\$\begingroup\$ @Frankenstein: EEPROM program and erase cycles take place by somewhat similar means. Most flash devices use completely different mechanisms for programming and erasure. At least one device I worked with on a very low level was the TI 320F206 microcontroller which makes user software responsible for controlling the timing of programming and erase cycles. On that chip, one could imagine the memory as consisting of a bunch of buckets with valves that can selectively drain them, sitting under a bunch of overhead sprinklers that can fill them. Weird things can happen if the buckets... \$\endgroup\$– supercatCommented Apr 26, 2016 at 5:51
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2\$\begingroup\$ ...get too full, so in order to erase the array, one must drain all the buckets, turn on the sprinklers for a little while, check to see if all the buckets are full yet, turn on the sprinklers a little more if they aren't, then check again, etc. If the sprinklers are turned on too long, it will be necessary to do a special operation to fix things [I don't remember exactly how that worked]. All considerably more complicated than EEPROM which could be erased directly. \$\endgroup\$– supercatCommented Apr 26, 2016 at 5:54
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2\$\begingroup\$ @Nitin: I think of flash devices as typically allowing somewhere between 1,000 and 100,000 program/erase cycles, and EEPROM devices as typically allowing somewhere between 10,000 and 10,000,000. I don't have enough experience to know whether aging would be more likely to cause writes to take longer or fail altogether, or whether it would be more likely to result in bits that change state sometime after they are written. I do know that some flash chips specify that erase operations on a row will slightly degrade charges on neighboring rows, such that if a row's neighbors... \$\endgroup\$– supercatCommented Jul 30, 2021 at 19:45
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2\$\begingroup\$ @Nitin: The act of writing and erasing a block together represent one cycle on that block. In general, the primary endurance consideration is the maximum number of time any particular block gets written and erased. \$\endgroup\$– supercatCommented Aug 5, 2021 at 22:48
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The ONLY major difference between the two is the read/write/erase logic.
**Fun Fact**
There's a common misconception that *NOR Flash* uses *NOR gates* while *NAND Flash* uses *NAND gates* (and in fact it seems obvious). **However that is not true.** The reason for the naming is the resemblance of the control logic of each memory type with the NAND and NOR gate schematic symbols.
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Spoiler: EEPROM is in fact Flash.
As supercat's answer brilliantly pointed out, EEPROM is an evolution of the older UV-eraseable EPROMs (EEPROM's "EE" stands for "Electrically Eraseable"). However, despite it being an improvement to its old pal, today's EEPROM's way of holding information is the exact same of the flash memory.
The ONLY major difference between the two is the read/write/erase logic.
NAND Flash (regular flash):
Can only be erased in pages aka. blocks of bytes. You can read and write (over unwritten) single bytes, but erasing requires wiping out a lot of other bytes.
In micro-controllers, it's generally used for firmware storage. Some implementations support flash handling from within the firmware, in which case you can use that flash to hold information as long as you don't mess with used pages (otherwise you'll erase your firmware).
NOR Flash (aka EEPROM):
Can read, write and erase single bytes. Its control logic is laid out in such way that all bytes are accessible individually. Although it's slower than regular flash, this feature benefits smaller/older electronic devices. For instance, older CRT TVs and monitors used EEPROMs to hold user configurations such as brightness, contrast, etc.
In micro-controllers, that's what you generally use for holding configurations, states or calibration data. It's better than flash for that as for erasing a single byte you don't have to remember (in RAM) the contents of the page to rewrite it.
**Fun Fact**
There's a common misconception that *NOR Flash* uses *NOR gates* while *NAND Flash* uses *NAND gates* (and in fact it seems obvious). **However that is not true.** The reason for the naming is the resemblance of the control logic of each memory type with the NAND and NOR gate schematic symbols.
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1\$\begingroup\$ great comment. I now better understand why an MCU SDK would provide a driver to emulate an EEPROM on their flash. \$\endgroup\$– gbtCommented Aug 27, 2020 at 20:42
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\$\begingroup\$ As I read it on other online sources "Flash memory writes in 'pages' and deletes in 'blocks'." However, I think the page and block sizes can be the same, i.e. by having only 1 page in each block. \$\endgroup\$– Xfce4Commented May 11, 2022 at 8:22
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Flash is a type of EEPROM (Electrically Erasable Programmable Read-Only Memory). "Flash" is more of a marketing term than a specific technology. However, this terms has sortof converged to mean a type of EEPROM that is optimized for large size and density, usually at the expense of large erase and write blocks and lower endurance.
answered May 14, 2013 at 12:31
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10\$\begingroup\$ why do they call it read only memory still, isnt that kind of dumb if it is read and wright? \$\endgroup\$– skylerCommented May 14, 2013 at 12:33
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4\$\begingroup\$ @skyler: It's partly historical, and partly it makes some sense. The original ROM (read-only memory) were mask-programmed, meaning it was done as a step in chip construction. Then there were fusable links that put the P in PROM. Today's EEPROM is still read-mostly memory. The process of writing is lots more complicated and slower than reading, and in this case wears out the chip. These kind of floating gate memory cells can only be erased and written so many times before they physically fail. \$\endgroup\$ Commented May 14, 2013 at 13:45
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\$\begingroup\$ Can you write a magnetic hard drive or floating-gate transistor more times? \$\endgroup\$– skylerCommented May 14, 2013 at 14:24
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\$\begingroup\$ @skyler: If one were to write one area of a hard drive as fast as possible, one could probably write it over a billion times per year, for years on end, without it wearing out. Floating-gate transistors don't come close without wear leveling. With wear leveling, the amount of data that could be written at maximum speed to a flash device before it wears out would be comparable to that of a hard drive (some flash devices would probably be better; some worse). \$\endgroup\$– supercatCommented May 14, 2013 at 15:22
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3\$\begingroup\$ @skyler: Many early EEPROM chips could be connected directly to a microprocessor bus for read-only access, but writing to them would require conditions which a normal microprocessor bus could not produce. As such, they would often be written using a piece of equipment called a "programmer", and then plugged into a device that would read data from them. \$\endgroup\$– supercatCommented May 14, 2013 at 15:26
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Flash memory is a variation of EE-PROM that is becoming popular.The major difference between the flash memory and EE-PROM is in the erasure procedure.EE-PROM can be erased at a register level,but the flash memory must be erased either in its entirety or at the sector level.
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\$\begingroup\$ How did your answer improve over the one that was already accepted? It doesn't appear to me that you added any information or perspective to what has already been said. \$\endgroup\$– Joe HassCommented Feb 21, 2014 at 16:49
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"Flash" storage is a catch-all term for storage inside memory chips(Non-Volatile Memory), rather than spinning disks like Floppy disk, CD, DVD, Hard disk, etc.
NOR and NAND are the original flash memory chips, and was invented by Fujio Masuoka while working for Toshiba circa year 1980. "NOR" and "NAND" are used in most USB thumb drives.
Flash storage also includes both EEP-ROM (electrically erasable programmable read-only memory) and NV-RAM (Non-Volatile Random-Access Memory). EEP-ROM is cheaper, and used for storage in most System-on-Chips and Android devices. NV-RAM is more expensive, and used for Solid-State Drives and storage in Apple devices.
The new NV-RAM chips are much faster than EEP-ROM and other Flash technologies.
For more Info, see: http://www.crifan.com/___flash_memory_nand_eeprom_nvram_and_others_zt/
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2\$\begingroup\$ DIMMs will be DIMMs regardless of Dynamic RAM or Non-Volatile RAM. MRAM, FeRAM and PCRAM used as storage drives do fall within the catch-all term "Flash storage" \$\endgroup\$– NeelCommented Mar 23, 2017 at 8:00
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1\$\begingroup\$ Thanks! Ever since I found out that Triple Level Cell NAND FLASH has eight levels and not three I've become more aware (wary?) of terminology. \$\endgroup\$– uhohCommented Mar 23, 2017 at 8:21