In this answer stevenvh suggests that Flash memory uses the same floating-gate technology as EEPROM. However! Looking at a random AVR datasheet it says for EEPROM 100 000 erase/write cycles, while for Flash (on the same chip!) this is only 10 000. Whence this difference?
It's the same basic principle. These type of insulated gate stored charge memory cells can be made with various tradeoffs. Generally those called EEPROM are optimized for more write cycles and individual access, while "flash" is optimized for high density and therefore lower cost. Compare the ratio of the number of "EEPROM" bits versus "flash" bits on the same chip. It would be too expensive to implement the large main processor memory with the same devices as what they call EEPROM. Also compare the write and erase block sizes to see another difference.
Actually flash is just a type of EEPROM, since EEPROM stands for Electrically Erasable Programmable Read Only Memory. Flash is largely a marketing term for a insulated gate stored charge non-volatile EEPROM optimized for a certain set of characteristics.
When EEPROM devices first appeared on the scene, many of them could only be erased as a complete unit. Later, as the technology evolved, manufacturers started in many cases including hardware to allow individual bytes to be erased and reprogrammed without disturbing other data. Today, the term "EEPROM" is often used to refer to devices which are designed to allow small amounts of information to be programmed and erased, while "flash" is used to refer to devices in which erasure must happen in large chunks.
Although of the one advantages of small erasable units is convenience, another advantage is endurance. A significant cause of wear in a flash device is over-erasure. Energy spent trying to erase a memory cell which is already erased will go instead toward destroying the device. When trying to erase a region of memory (be it a byte or a 256K block), one must hit it with an erase pulse, see if it's erased, hit it with another erase pulse if needed, etc. If most of the bits in a block of flash are erased, but some are not, it will be necessary to hit all the bits (including the adequately-erased ones) with another erase pulse. In devices with smaller erasable units, there's likely to be less difference between the time required to erase the 'toughest' bit in a block and the time required to erase the 'easiest'.