Timeline for PNP high side switch base current leak?
Current License: CC BY-SA 3.0
18 events
when toggle format | what | by | license | comment | |
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Jul 18, 2016 at 14:37 | comment | added | nsayer | Well, if you see my comment on the accepted answer, everything's working now... I'm not sure you understand the purpose of the signals nothing to the left of the diode is supposed to have any influence at all on the LED. | |
Jul 18, 2016 at 7:49 | comment | added | winny | @nsayer It is. Reading though this page it seems like you are dead set everything is correct, nothing needs to be changed and the LED would just light up anyway. I give up. | |
Jul 18, 2016 at 0:45 | comment | added | nsayer | @winny You say that like it's a bad thing. | |
Jul 17, 2016 at 20:52 | comment | added | winny | @nsayer But that diode will prevent anything left of it from ever forward biasing the base of Q1. Simulate it and you will see. | |
Jul 17, 2016 at 18:18 | comment | added | nsayer | It's fairly simple. When !PI_RST is asserted to 0, the LED should turn on. Otherwise, it should be out. No other condition should matter. !BUFFEN is an output - it's !PI_RST level-shifted to be relative to VCCIO. I think the leakage path is likely reverse-current through the diode and pull-up to VCCIO. The solution was to strongly bias-off the transistor and make the input bias twice as weak by comparison. | |
Jul 17, 2016 at 15:28 | comment | added | jbord39 | Maybe add a truth table for the !BUFF_EN, PI_RST, and VCCIO signals, each for any of their possible inputs, showing what you want the LED to do. | |
Jul 17, 2016 at 14:00 | comment | added | nsayer | @winny Yes. That's the whole point. | |
Jul 17, 2016 at 7:10 | vote | accept | nsayer | ||
Jul 17, 2016 at 7:02 | comment | added | winny | @nsayer Is PI_RST active low when programming? Otherwise I don't see how this will function. The diode blocks all other paths to ground. | |
Jul 17, 2016 at 2:27 | history | tweeted | twitter.com/StackElectronix/status/754502730861993984 | ||
Jul 17, 2016 at 1:41 | answer | added | jbord39 | timeline score: 1 | |
Jul 17, 2016 at 1:31 | comment | added | jbord39 | How does this circuit even work? The diode prevents the PNP from supplying any base current, unless PI_RST is leaking; but the poster says that port is high impedance. Or am I misunderstanding something. | |
Jul 17, 2016 at 1:12 | answer | added | user57037 | timeline score: 2 | |
Jul 16, 2016 at 23:15 | answer | added | EM Fields | timeline score: 0 | |
Jul 16, 2016 at 22:33 | comment | added | nsayer | !PI_RST is straight from Raspberry Pi GPIO 25. When it's idle, it's high impedance (probably configured as an input), and when it's active and configured as an output it's ether explicitly low or high (+3.3v). | |
Jul 16, 2016 at 22:20 | answer | added | vicatcu | timeline score: 0 | |
Jul 16, 2016 at 21:53 | comment | added | winny | Is !PI_RST active low and totem-pole/not open collector? | |
Jul 16, 2016 at 21:42 | history | asked | nsayer | CC BY-SA 3.0 |