Timeline for How to multiply a very slow clock (1 kHz) into MHz range
Current License: CC BY-SA 4.0
18 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Apr 1, 2021 at 22:12 | vote | accept | tschaboo | ||
| Mar 29, 2021 at 3:41 | review | Close votes | |||
| Apr 3, 2021 at 3:03 | |||||
| Mar 29, 2021 at 3:24 | comment | added | old_timer | should be much cheaper to use a faster (mhz) clock, possibly multiply that up to 40m as needed, and down to 1k than to find some very expensive 1k source and pll... | |
| Mar 19, 2021 at 18:29 | comment | added | user57037 | Why not have the master device also supply a master 40 MHz clock to all the other boards? Terminate at the "last" board on the line? | |
| Mar 19, 2021 at 18:14 | answer | added | Krauss | timeline score: 2 | |
| Mar 19, 2021 at 17:08 | answer | added | bobflux | timeline score: 2 | |
| Mar 19, 2021 at 16:03 | comment | added | Spehro 'speff' Pefhany | You would need some way of synchronizing the ADCs otherwise they'll probably start up +/-500usec not a few microseconds. Also, ADCs can be sensitive to jitter on the input clock, which could negatively affect the accuracy. | |
| Mar 19, 2021 at 15:48 | history | edited | Neil_UK | CC BY-SA 4.0 |
its
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| Mar 19, 2021 at 15:42 | comment | added | bobflux | Can you post link to ADC datasheet, Also sample freq you use pls | |
| Mar 19, 2021 at 15:30 | history | edited | Null♦ | CC BY-SA 4.0 |
don't use "edit" in the text -- we can see the edit history
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| Mar 19, 2021 at 15:06 | comment | added | Lior Bilia | If your RS485 is running at 1MHz your slaves have to have a local clock or crystal in order to receive this signal. Can you post a schematic? | |
| Mar 19, 2021 at 14:51 | review | Close votes | |||
| Mar 19, 2021 at 15:30 | |||||
| Mar 19, 2021 at 14:43 | comment | added | tschaboo | I've updated the question ("Edit 1") and hopefully provided the requested details. | |
| Mar 19, 2021 at 14:43 | history | edited | tschaboo | CC BY-SA 4.0 |
added 716 characters in body
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| Mar 19, 2021 at 14:18 | comment | added | Eugene Sh. | Could you please describe your topology and the application? Sounds like an XY-problem | |
| Mar 19, 2021 at 14:13 | answer | added | user1850479 | timeline score: 2 | |
| Mar 19, 2021 at 14:11 | comment | added | TonyM | You'd need a very very steady 1 kHz. Please edit your question and detail the source of the 1 kHz and its accuracy. More detail the better, please. | |
| Mar 19, 2021 at 13:54 | history | asked | tschaboo | CC BY-SA 4.0 |