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Here an old smps circuit which is very similar to mine. But the gate driving voltage seems to be very high in my opinion.

Q1. If the gate threshold of the MOSFET is 2-4V , will the 12-15V pulse train from the UC3844 drive the MPSFET into saturation ( Id > 20A) ?

Q2. R4 and G6 don't seem to reduce the input gate voltage, then what are their functions?

Q3. What is the expected Id (in mA, I feel it shouldn't be more than 50omA else the 2W Rs will burse) ?

Q4. The primary impedance of the pulse transformer reads 1M ohms on DDM. Can't find any reference on internet so far. IS it way too high?

Thanks.

enter image description here

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    \$\begingroup\$ Exactly as designed, The FET SHOULD ABSOLUTELY be in saturation. The current rate of rise is limited by the transformer N1 and detected as a voltage developed across R5 to detect the switchoff point. \$\endgroup\$
    – Jack Creasey
    Commented Jul 31, 2018 at 15:55
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    \$\begingroup\$ MOSFET linear and saturation regions not to be confused with the saturation region of a BJT! @JackCreasey \$\endgroup\$
    – Andy aka
    Commented Jul 31, 2018 at 16:00
  • \$\begingroup\$ @Andyaka. I'm not confused about BJT ...are you? This is a stock standard SMPS application with a well understood and documented driver. The FET will need to be in saturation with a low VDS when on. onsemi.com/pub/Collateral/UC3844-D.PDF Look at Figure 16 to understand the current sensing if you are confused about the operating point. \$\endgroup\$
    – Jack Creasey
    Commented Jul 31, 2018 at 17:52
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    \$\begingroup\$ @JackCreasey MOSFET saturation is one thing and MOSFET linear region (where it should be operating) is another. \$\endgroup\$
    – Andy aka
    Commented Jul 31, 2018 at 17:53
  • \$\begingroup\$ @Andyaka. The operation in this SMPS is not in the linear mode. Perhaps some reading might help your understanding: microchip.com/stellent/groups/SiteComm_sg/documents/… \$\endgroup\$
    – Jack Creasey
    Commented Jul 31, 2018 at 17:59

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If the gate threshold of the MOSFET is 2-4V , will the 12-15V pulse train from the UC3844 drive the MPSFET into saturation ( Id > 20A) ?

It will drive the MOSFET into the linear region where it acts like a low resistance on switch. 20 amps can only be drawn if the transformer primary current rises to that value and this seems very unlikely looking at the schematic because the core will very likely saturate. Vgs(th) must be significantly exceeded to operate the MOSFET correctly in this application.

Q2. R4 and G6 don't seem to reduce the input gate voltage, then what are their functions?

R4 is to prevent high surge current into the mainly capacitive impedance of the MOSFET gate-source region. It's a form of slew rate control that can be effectively used for reduction in EMI. R6 prevents the MOSFET gate floating and turning on the MOSFET should the driver IC (UC3844) go into a brown out situation.

Q3. What is the expected Id (in mA, I feel it shouldn't be more than 50omA else the 2W Rs will burse) ?

I expect it'll be less than 1 amp but it all depends on the value (ambiguously marked as 0.17) and the switching frequency and the primary transformer inductance.

Q4. The primary impedance of the pulse transformer reads 1M ohms on DDM. Can't find any reference on internet so far. IS it way too high?

Sounds like it is broken. You should be able to measure a few ohms between the terminals of N1.

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  • \$\begingroup\$ Thanks again. R6 to prevent floating gate seems nice. Rs value is 0.17 ohm , no ambiguous. \$\endgroup\$
    – ObliteratedJillo
    Commented Jul 31, 2018 at 16:10

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