Just a note for future reference: You should use the MathJAX tags when writing equations to clean them up!
This is the small signal equivalent model of a degenerated common-source stage:
simulate this circuit – Schematic created using CircuitLab
Note that the gate is modeled as an open branch, because no current flows into the gate. Therefore \$ I_g \$ is 0. We can then write KVL/KCL equations to relate \$ V_s \$ and \$ V_o \$.
If you look at the right side of the circuit, all of the current from the dependent current source flows through \$ R_2 \$. Which means that \$ V_{out} = - g_m V_{gs} R_2 \$ Now, all we need to do is relate \$ V_{gs} \$ to \$ V_s \$. Note that since no current flows through the resistor, the voltage drop across the resistor is 0.
So \$V_{gs} = V_s - g_m V_{gs} R_1 \$.
We can rewrite the above expression as the following
$$
V_s = V_{gs}\left ( 1 + g_m R_1 \right)
$$
Now we substitute \$ V_{gs} \$ into into the equation for \$ V_{out} \$:
$$
V_{out} = \frac{-g_m R_2 V_S}{1 + g_m R_1}
$$
$$
A_v \equiv \frac{V_{out}}{V_s} = \frac{-g_m R_2}{1 + g_m R_1}
$$