R-Cd parallel damping during power on

Question

I am researching the PI filter. There're a number of great articles on how to calculate values for inductor and capacitors, the response curves and frequencies. Examples are: Input Filter Design for Switching Power Supplies, Ferrite Beads Demystified, Optimal Single Resistor Damping of Input Filters etc etc.

The circuit below works great, suppressing the ringing during fast power supply voltage rise. I will not include simulation pics as it is fairly easy to draw and simulate it.

However I can not find any information on the damping resistor power rating. The steeper voltage rise, the higher immediate current flows through the resistor while its series capacitor is not charged. Taking damping resistor as 2 Ohm, it will anyway be much larger than tantalum cap or MLCC ESR, thus during power on most power will be seen on the resistor. I simulated it to be up to 45 Watt...

Here's my test circuit:

L2 is a ferrite bead BLM21PG221, consider it working in its inductive region. (however during fast transients, including power on, may it be more capacitive/resistive rather than inductive?)

The only statement about damping resistor current I found in third source I cited:

Capacitor Cd blocks dc current, to avoid significant power dissipation in R.

Yes, in static it is. But I am sure people also considered dynamic performance - in particular during power on.

So what do I miss here and what would be the power rating on the damping resistor?

There's a second question, very closely coupled with the above one: what is practically achievable power rail rise time? The answer to this question will define the answer to former one. Yes, ATX power supplies have strict standard on the power level rise time, what about other type of power supplies (switching and AC-DC)? What about turning switch on closing the circuit, theoretically happening in a nanosecond causing very sharp rise time? Does the first capacitor on the power wire path makes a difference "absorbing" the initial voltage strike?

Answer 1

The supply is supposed to be steady, or having small variations, so the only major events should be turn on and turn off. Then, the snubber acts as a differentiator for the voltage across it, so the main factor contributing to the current will be the variation of the voltage, or (in the case of on/off) the rising and falling times. Which means that the current through the branch will be the same for 2, or 20 Ω (there is a higher limit and it's given by the time constant). This, in turn, means that a higher resistor will dissipate more power, so the 2 Ω will dissipate 10x less than the 20 Ω. It will also damp less.

But these events do not happen too often, and the dissipated power is an integral, thus the instantaneous power will be temporally smeared. So for this case, the dissipated power will not be the resistor's nominal value, e.g. 0.5 W, it will be the graph you see as the maximum permissible peak power. For example, here is the graph for some metal film resistors from Vishay:

This graph has meaning for the instantaneous power, and only now you can plot it to see whether the resistor is suitable (note: the pulse is 48 V):

The series resistance is stepped through the values of 2, 20, 200, and 2000 Ω, and the bottom plot shows the instantaneous power vs the output voltage (upper plot). Unfortunately, the range involves three orders of magnitude, and the logarithmic scale didn't help very much, so it doesn't look very well, but you can still see that for 2 Ω, there is a small peak (black trace); there is another one for the falling edge, but it's buried. At any rate, the measurements show that for all the values except 2000, the powers are relatively proportional to the falling and the rising edges of the voltage, but the 2 kΩ one (green trace) forms a time constant of 20 ms which, compared to the falling edge of V(x) of ~11 ms is too great and the snubber now has adverse effects. In fact, even the 200 Ω (red trace) is a bit too much, though rather borderline.

The measurements for the peak powers are:

Measurement: pmax1
  step  MAX(v(y)*i(r1)) FROM    TO
     1  0.0790655   0   0.08
     2  0.720628    0   0.08
     3  2.41864 0   0.08
     4  0.806291    0   0.08

Measurement: pmax2
  step  MAX(v(y)*i(r1)) FROM    TO
     1  0.00417929  0.08    0.2
     2  0.0417876   0.08    0.2
     3  0.397681    0.08    0.2
     4  0.587792

Looking over the graph which shows that for a 10 ms duration the maximum allowed power for a 50% time of the total pulse duration is ~800 mW. The 2nd trace (20 Ω) has the 1st peak at ~721 mW, so it should be safe. 200 Ω is too much, though it should be safe for the 2nd pulse. This implies the power supply to be turned on for 10 ms, and then off, every 20 ms, and it will be at the limit, but should be safe. Of course, since the graph is titled "maximum permissible peak pulse power", I wouldn't test the limits, but I would go until half, two thirds, or so.

If you consider the averages of the pulses, then you must consider the rated dissipated power, in this case, for SFR16S, 0.5 W.

If you want to test for yourself, these are the .meas lines:

.meas Pmax1 max V(y)*I(R1) from 0 to 80m
.meas Pmax2 max V(y)*I(R1) from 80m to 0.2
.meas tr1 find time when V(y)*I(R1)=Pmax1/100 rise=1
.meas tf1 find time when V(y)*I(R1)=Pmax1/100 fall=1
.meas tr2 find time when V(y)*I(R1)=Pmax2/100 rise=2
.meas tf2 find time when V(y)*I(R1)=Pmax2/100 fall=2
.meas Pd1 avg V(y)*I(R1) from tr1 to tf1
.meas DeltaT1 param tf1-tr1
.meas Pd2 avg V(y)*I(R1) from tr2 to tf2
.meas DeltaT2 param tf2-tr2