3
\$\begingroup\$

I am designing an RS-485 bus using TI's SN65HVD17xx transceiver.

I am trying to calculate the voltage drop along the bus and what voltage the last transceiver on the bus sees, in order to find the maximum cable length I can run. The datasheet doesn't mention what the single-ended output voltage is; can I assume that it equals the input voltage VCC?

\$\endgroup\$
1
  • \$\begingroup\$ These are differential receivers/drivers, so the datasheet gives the common mode and differential output voltages. \$\endgroup\$
    – Finbarr
    Commented May 12, 2023 at 22:09

3 Answers 3

1
\$\begingroup\$

You can't assume that either output from the transmitter will have any particular potential with respect to ground, but the datasheet does make some guarantees about output potentials with respect to each other (differential output voltage). It seems that the most apposite graph is on page 10:

enter image description here

These are technically DC currents you may expect given certain load and power supply conditions. Considering that your cable resistance will vary with length, which is accompanied by a commensurate variation in output current, there's no particular point on this graph that one could point to and say "you are here".

However since an increase of load resistance (a lengthening of the bus) will result in an increase of output voltage, I think it's fair to say that the lowest output voltage you can expect is the limiting factor, and so start by identifying where on this graph is representative of a zero-length bus whose DC resistance is purely due to termination resistors.

You would first choose terminating resistances depending upon the transmission line's characteristic impedance. Let's say 120Ω at each end, for a combined load resistance of 60Ω. In the worst case, when the power supply is 4.5V only, you'll obtain a differential output of ±1.8V.

I'm not sure which offical standard defines minimum RS-485 signalling voltages, but if you are not certain that all transceivers on this bus will be using the same IC, then you will need to refer to that document to find minima that all such devices should comply with.

If you will be using SN65HVD17xx devices exclusively, then we can refer to the datasheet. On page 7, parameters \$V_{IT+}\$, \$V_{IT-}\$ and \$V_{HYS}\$ are telling us what input differentials are required for the receiver to switch between high and low states.

Even though hysteresis is 50mV, I am reluctance to use this as a guide for signal amplitude. My interpretation of these figures is that switching occurs when the difference is significantly negative, in the region −100mV to −150mV. Since our differential signal is presumably somewhat symmetrical about zero, this implies that we must apply ±150mV at the very least to cause the receiver to recognise a change.

Personally, I would double this to ±300mV, representing the worst, most attenuated signal condition that I can apply at the receiver input, and still be sure that switching occurs properly.

Now we know what the signal amplitudes are at either end of the longest permissible resistive bus, and we can proceed to find out the maximum permissible wire resistance.

Note that from here we can disregard the terminating resistance at the transmitter end, since we know the potential difference there, and we have already accounted for current through it. In other words, the resistive potential divider which is responsible for attenuation consists of only the wire and the terminating resistance at the receiver end:

schematic

simulate this circuit – Schematic created using CircuitLab

$$ \begin{aligned} V_{RX} &= V_{TX} \frac{R_T}{R_T+2R_W} \\ \\ R_W &= \frac{R_T}{2V_{RX}}(V_{TX} - V_{R_X}) \\ \\ &= \frac{120\Omega}{2 \times 0.3V}(1.8V - 0.3V) \\ \\ &= 300\Omega \end{aligned} $$

Since that's all the information I have, I'll leave it up to you to find out what length of wire that corresponds to.

\$\endgroup\$
2
  • \$\begingroup\$ Actually the voltages required by standard are in the data sheet, the chip is rated to comply the standard and exceed it. There must be at least 200mV or more between A and B wires at receiving end. Your formula is therefore approximately correct but it is slightly more complex, as it assumes ideal receiver won't load the bus and assumes no tolerance for termination resistance. Usually you can have max 32 standard transceiver loads on same bus, or 64 half-loads, etc so the amount and type of receivers affect the values. Any failsafe biasing also affects the values. \$\endgroup\$
    – Justme
    Commented May 13, 2023 at 8:57
  • \$\begingroup\$ I think that's a good starting point, and may be the best OP has to work with. But, the graph you referenced shows typical values. If OP's application is critically dependent on the Vo (l,h) of the driver, then he needs something more than that graph to design with. \$\endgroup\$
    – SteveSh
    Commented May 13, 2023 at 15:00
1
\$\begingroup\$

You have a conundrum here. You're application needs to know the single ended output voltage of the driver. I assume you need this value worst case, over temperature, supply and device variation, along with end of life (EOL).

The data sheet for the part you chose to use does not provide this information. So you have several of choices.

  1. Chose a different part where the output Va, Vb levels are guaranteed by the data sheet. Do not use typicals.
  2. See if you can conclude what those voltage levels are from other guaranteed parameters in the data sheet.
  3. Create a source control drawing for your part which includes the requisite specs for Va and Vb output voltage levels, and have the vendor sign up to test or otherwise guarantee that parts procured to that drawing meet those specs.

As an example of 1), here's part of the data sheet from NSC's (probably TI now) DS26C31 '422 line driver (I know OP wants '485, but this is just illustrative what he needs to look for on the data sheet).

enter image description here

It's also interesting that many/most LVDS drivers (not what OP is using) DO provide the information OP wants, Vol & Voh.

\$\endgroup\$
4
  • \$\begingroup\$ I don't see the conundrum and why would single ended voltages matter. The chip adheres to RS-485 standard and it can drive the rated load with guatanteed differential voltage which is compatible with a standard compliant receiver. The RS-485 standard does not require specific single ended voltages - it may be possible to derive them from the given parameters, but the parameters just define how much current and differential voltage must be achieved into rated load and with what common mode voltage range. That is enough to be able to estimate cable length but it also depends on cable parameters. \$\endgroup\$
    – Justme
    Commented May 13, 2023 at 17:07
  • \$\begingroup\$ The conundrum is that OP is insisting (maybe too strong a word) that he DOES care about Vo of the driver, but that parameter is not specified in the part he's chosen. It's not me that's insisting on a value for Vo. \$\endgroup\$
    – SteveSh
    Commented May 13, 2023 at 19:25
  • \$\begingroup\$ @Justme, terminal voltages certainly do matter depending on what you're doing, one can't get carried away with this notion that it's differential signalling so only their relative voltages matter. For just one example, when circuit testing, either at IC outputs or cable ends, to look for full function (production) or degradation (field service). If one confines their view to just working communications then just the diff can be considered but there's a lot more to the design/manf/test/support/service life cycle than that, regardless of what the OP's specific circumstances are. \$\endgroup\$
    – TonyM
    Commented May 13, 2023 at 19:42
  • 1
    \$\begingroup\$ And there may be times when you can only use one side of an RS-422/485 output. We had such a situation where we were interfacing with an existing piece of equipment. It only had a single input available, and our side only had RS-422 outputs available. So we needed to know the absolute range of Vo in order to properly design the interface. \$\endgroup\$
    – SteveSh
    Commented May 13, 2023 at 20:36
0
\$\begingroup\$

That assumption wouldn't yield good calculations. RS-485 is a differential bus, where
if Va - Vb > 200mV ; logic 1
if Vb - Va > 200mV ; logic 0

The output of this is not going to be at Vcc like you might expect for a UART, or some kind of single-ended signaling. If you look at the datasheet 7.5, it doesn't give an output voltage, but an output voltage magnitude, that is to say the difference between Va and Vb (as a scalar). The common mode voltage can be anywhere from 1-3V, and therefore your maximum voltage could be 3-4.75 V.

What's important, is that after some voltage drop across your lines, the receiver still sees enough differential voltage to meet the conditions above. What you need to do is figure out the resistance of your cabling, and then you can calculate the drop and whether you're going to lose too much. enter image description here
From a DC analysis that looks like this [edited from CL's input, the total load presented to the receiver must be >54 Ohm). If you have 1.5V across the source, add the R_Wire, and you still have more than 200mV across the load then it should work. Note this is just DC, you also need to consider the data rate, and the length of the line comes into play then.

For comparison, if you assumed the output was going to be Vcc, and you wires has a resistance of say 20 Ohm (not particular reason I've used this number) you might expect to see
V = 5V * 120 / 160 = 4.3 V
However with this total load of 64 Ohms, you're output voltage is going to be much less, I can't see a good way to figure this from the datasheet, but let's use 1.5V as a worse-than-worst case
V = 1.5V * 120 / 160 = 1.13V
Of course, this is still going to work, as this is greater than the required 200mV, but it's quite off from the initial assumption.

\$\endgroup\$
11
  • 1
    \$\begingroup\$ Why would it be a 'poor assumption' by the OP? It's reasonable for the OP to assume or imagine that either output could go to rail voltages, it's not a low-quality assumption. Do you mean an incorrect assumption? \$\endgroup\$
    – TonyM
    Commented May 12, 2023 at 23:18
  • \$\begingroup\$ @TonyM It depends how the bus is terminated. The chip just guarantees there will be at least 1.5V over 54 ohms and typically 2V, so unlikely there will not be 5V under normal termination conditions. With no load there could be 5V. \$\endgroup\$
    – Justme
    Commented May 12, 2023 at 23:29
  • \$\begingroup\$ @Justme, quite. But I'm actually commenting on the language used which I think reads as unnecessarily critical. \$\endgroup\$
    – TonyM
    Commented May 13, 2023 at 0:09
  • \$\begingroup\$ The resistor values are wrong; 54 Ω is the total load, i.e., the combination of both termination resistors and the unit loads of all receivers. \$\endgroup\$
    – CL.
    Commented May 13, 2023 at 6:13
  • 1
    \$\begingroup\$ @TonyM, "A poor assumption" is one that isn't correct, or likely to produce incorrect results. Of course, I can admit that it's probably a poor assumption to assume everyone's familiar with the term, so I've changed it. \$\endgroup\$
    – LordTeddy
    Commented May 15, 2023 at 10:59

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.