You can't assume that either output from the transmitter will have any particular potential with respect to ground, but the datasheet does make some guarantees about output potentials with respect to each other (differential output voltage). It seems that the most apposite graph is on page 10:
These are technically DC currents you may expect given certain load and power supply conditions. Considering that your cable resistance will vary with length, which is accompanied by a commensurate variation in output current, there's no particular point on this graph that one could point to and say "you are here".
However since an increase of load resistance (a lengthening of the bus) will result in an increase of output voltage, I think it's fair to say that the lowest output voltage you can expect is the limiting factor, and so start by identifying where on this graph is representative of a zero-length bus whose DC resistance is purely due to termination resistors.
You would first choose terminating resistances depending upon the transmission line's characteristic impedance. Let's say 120Ω at each end, for a combined load resistance of 60Ω. In the worst case, when the power supply is 4.5V only, you'll obtain a differential output of ±1.8V.
I'm not sure which offical standard defines minimum RS-485 signalling voltages, but if you are not certain that all transceivers on this bus will be using the same IC, then you will need to refer to that document to find minima that all such devices should comply with.
If you will be using SN65HVD17xx devices exclusively, then we can refer to the datasheet. On page 7, parameters \$V_{IT+}\$, \$V_{IT-}\$ and \$V_{HYS}\$ are telling us what input differentials are required for the receiver to switch between high and low states.
Even though hysteresis is 50mV, I am reluctance to use this as a guide for signal amplitude. My interpretation of these figures is that switching occurs when the difference is significantly negative, in the region −100mV to −150mV. Since our differential signal is presumably somewhat symmetrical about zero, this implies that we must apply ±150mV at the very least to cause the receiver to recognise a change.
Personally, I would double this to ±300mV, representing the worst, most attenuated signal condition that I can apply at the receiver input, and still be sure that switching occurs properly.
Now we know what the signal amplitudes are at either end of the longest permissible resistive bus, and we can proceed to find out the maximum permissible wire resistance.
Note that from here we can disregard the terminating resistance at the transmitter end, since we know the potential difference there, and we have already accounted for current through it. In other words, the resistive potential divider which is responsible for attenuation consists of only the wire and the terminating resistance at the receiver end:
simulate this circuit – Schematic created using CircuitLab
$$
\begin{aligned}
V_{RX} &= V_{TX} \frac{R_T}{R_T+2R_W} \\ \\
R_W &= \frac{R_T}{2V_{RX}}(V_{TX} - V_{R_X}) \\ \\
&= \frac{120\Omega}{2 \times 0.3V}(1.8V - 0.3V) \\ \\
&= 300\Omega
\end{aligned}
$$
Since that's all the information I have, I'll leave it up to you to find out what length of wire that corresponds to.