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I'm using a Nucleo-F446RE with CubeIDE and HAL.

I can write code which uses TIMER1, DMA request TIM1_UP to use DMA2 Stream 5 for memory-peripheral (GPIOC) transfers. I set the up DMA using:

HAL_DMA_Start(&hdma_tim1_up, (uint32_t) prbsdata, (uint32_t)(&GPIOC->ODR), 16);

When I try to change to TIMER2, the only choice in HAL is request TIM2_UP/CH3 using DMA1 Stream 1. When I run my code I get a TEIF transfer error. Since I'm not using FIFO, this appears to be a bus error. Here's my DMA setup line:

HAL_DMA_Start(&hdma_tim2_up_ch3, (uint32_t) prbsdata, (uint32_t)(&GPIOC->ODR), 16);

Looking at block diagrams, I thought I could use DMA1 -> AHB/APB bridge -> GPIOC.

Given the errors I'm getting, I'm now thinking there is no way to get from DMA1 to GPIO registers, or there is a special setup which I've yet to decipher from the documentation. STM32F446 Block Diagram

The real problem I'm trying to solve is that I'd like to connect DMA to the BSRR register, which requires a full word transfer and TIMER1 only supports half-words.

Any advice/help is appreciated.

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    \$\begingroup\$ But if you want to trigger a transfer from memory to GPIOC, what does it matter how wide the timer is? When the transfer is triggered, the DMA system does any length transfer from memory to peripheral address you have configured. \$\endgroup\$
    – Justme
    Commented Sep 8, 2023 at 19:50
  • \$\begingroup\$ For some reason, when I was trying to configure the memory increment, I could only select half word on some timers and full word on others. It seemed to correlate to DMA2 vs DMA1. Each timer only had one of the DMAs available. Today I was able to configure a full word increment just fine on TIMER1/DMA2. I don’t know what I was doing wrong to cause this but that problem is no longer. User error! \$\endgroup\$
    – 65Roadster
    Commented Sep 9, 2023 at 7:17

1 Answer 1

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Reference manual (F446) Figure.1 (System architecture for STM32F446xx devices) shows that DMA1 have not acces to AHB1 and AHB2 peripherals (GPIOs). You have to use DMA2.

your "grey path" is wrong, that path is used to control DMA, not used by DMA1 (or DMA2).

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  • \$\begingroup\$ Thanks so much, that's what I suspected. \$\endgroup\$
    – 65Roadster
    Commented Sep 8, 2023 at 20:40

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