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I am trying to generate a periodic signal with the DAC on the STM32G474 using DMA. There are tons of examples of this, and I´ve done the same in the past with an STM32L4 and F4 with no issues. However, I´m not sure if there is a problem in the STM32G4 line or a bug in the libraries/HAL code generation. I set up a simple example, just with a circular buffer of 2 samples at a slow rate, but I never get anything out, it generates on start a DMA transfer error and disables DMA.

I have tried different pins and channels. In the STM32G4, the DMA streams are multiplexed so you can use any as long as you are not using the same for other peripherals. I tried starting the timer first, including delays, calling HAL_DAC_Start() before HAL_DAC_Start_DMA() (which is redundant). Setting a value manually to the DAC works with no problem. I have tried also using Timer2. I´m using STM32CubeIDE 1.3.1 and the code is generated with STM32CubeMX 5.6.1, the latest versions.

The main.c is here, it includes all configuration: https://pastebin.com/F90s3iBz

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  • \$\begingroup\$ See if you can find a complete DMA example for that particular family which actually works, even if it has a different target peripheral... maybe there's a DMA UART example? There can be a fairly effective path of starting with working code that is similar to a need and then evolving or comparing it step by step towards what is actually needed until the key issue is found. And by "example" I mean a static set of source files, not something generated to order on the fly which may break do to generator configuration options or "oops we never thought someone would try to..." issues. \$\endgroup\$
    – Chris Stratton
    Commented Jul 12, 2020 at 15:06

1 Answer 1

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After a couple of days of trying everything I found the difference between the STM32G4 and the previous families with respect to DMA: The data width for the Peripheral has to be set as Word always, even though the data width for the Memory is set to Half Word. In the CubeMX tool, DAC configuration, DMA Settings tab:

STM32CubeMX DAC DMA Configuration

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  • \$\begingroup\$ Did you read the manual when investigating this? Because it of makes sense that the peripheral needs to be a full word if you look at the data holding register diagrams for the DAC. What previous family of the STM32 were you comparing to? \$\endgroup\$
    – DKNguyen
    Commented Jul 12, 2020 at 15:52
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    \$\begingroup\$ Did you read the manual when investigating this? Because it of makes sense that the peripheral needs to be a full word if you look at the data holding register diagrams for the DAC. What previous family of the STM32 were you comparing to and specifically which registers are you writing to in the previous family and this one? Because all the DAC data registers contain two fields but some registers have the entire field in [16:0] while others have the fields split between [11:0] and [27:16] which spans the entire word so it would make sense you need to define it as a word for these registers. \$\endgroup\$
    – DKNguyen
    Commented Jul 12, 2020 at 16:00
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    \$\begingroup\$ @DKNguyen In the STM32F4, F3, and L4 it worked properly only with both peripheral and memory with Half Word datawidth. I read the manual, but I didn´t pay attention to this, as I didn´t think this would have changed from previous families (my bad, I thought the problem was coming from something in the initialization code or libraries). \$\endgroup\$
    – davidrojas
    Commented Jul 12, 2020 at 16:42
  • \$\begingroup\$ Interesting. The way the DAC data registers are split into two fields holds true for both G4 and F3 series so I can't explain why it works in the F3 but not the G4, unless you were using the 8-bit DAC data registers in the F3 but are using the 12-bit for the G4 (the two 8-bit fields end-to-end at [16:0]) \$\endgroup\$
    – DKNguyen
    Commented Jul 12, 2020 at 18:48
  • \$\begingroup\$ @DKNguyen I use 12-bit always. See here in this answer a working example code for the STM32F3, it uses half-word for both, and 12-bit: stackoverflow.com/a/43032947/1374326 Indeed there is something in the DAC structure we are missing. \$\endgroup\$
    – davidrojas
    Commented Jul 13, 2020 at 4:35

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