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I'm trying to build a simple power supply board for my current and future projects. The plan is to use a USB-C PD charger and negotiate 12V out of it, expecting 1-1.5amperes typically (although it is configured to ask for 3.5A right now.) The main point is convenience and getting some experience with adding USB-C to my projects. I also need a 3v3 line to power micrcontrollers and sensors.

I'm using the CYPD3177 as PD controller.

The datasheet suggests a reference schematic with two PFETs for switching the main power line. It also points out that the VBUS_FET_EN pin used to drive those PFETs will output the same voltage it gets from VBUS_IN pin, which as I understand would be 12V after negotiation is done.

It looks like I need a PFET with a gate compatible with 12V (do I need some safety margin here?) for switching 20V (with safety margin) line and capable of handling 5A (with safety margin.) I found the PMN30XP

In the PFET datasheet, I see that the gate-source voltage is between -12V and +12V. Does that mean that anything beyond that would kill the component or is that the value at which I should expect best conductance?

The drain to source is -20V, which looks like what I need. Should I be concerned with the value being negative, though?

All the graphs related to Vgs go only to -2.5V or -5V. Does that mean that this is the driving voltage range that is expected to be used for normal operation or is anything beyond within safe limits okay, too?

For more context, below is the full schematic of the project so far. The "PD power line" section is what I'm focusing on.

Full project schematic

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3 Answers 3

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In PFET data sheet I see gate-source voltage is between -12V and +12V, does that mean that anything beyond that would kill the component or is that the value at which I should expect best conductance?

The key phrase you want to look for is "absolute maximum ratings". If you look at section 8, which for some reason they chose to call "Limiting Values", you'll see that they really mean that these are absolute maximum ratings.

The absolute maximum rating of a part is a "do not exceed" number. You always can exceed this rating, and sometimes you can meet with success in doing so, but that's the point where any implied warrantee expires.

All the graphs related to Vgs go only to -2.5v or -5v, does it mean that this is the driving voltage range is expected to be used for normal operation or is anything beyond within safe limits okay too?

In this case, yes and yes. A \$\mathrm{V_{GS}}\$ that exceeds -5V won't do you much good at all, but it won't be bad.

There are two things you can do here: choose a different PFET, or choose a different zener at D1.

For the FET, see if you can find a part that's rated for \$\mathrm{-20V \le V_{GS} \le +20V}\$. There are plenty of them out there, that should work with a \$\mathrm{V_{GS}}\$ of 5V.

For D1, that's a 22V zener, that looks to me like it's there to limit \$\mathrm{V_{GS}}\$ to not exceed -22V. You could change that to a zener that will insure that the FET is reliably turned on without \$\mathrm{V_{GS}}\$ exceeding -12V -- I'd look for the cheapest part between 6.8V and 10V.

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  • \$\begingroup\$ wouldn't there still be about 12V applied to the gates of both FETS though? Should I add a voltage divider or some other way to step it down to 5-6V for driving gates properly? \$\endgroup\$
    – Leo
    Commented Jan 2 at 21:00
  • \$\begingroup\$ As long as you're not exceeding the absolute maximum ratings you don't need to drop the voltage to 5V. With the change in the zener you won't be applying 12V -- that's the point of the change. With the change in the PFET, the absolute maximum rating won't be 12V. The whole point of my suggestions are to keep the FET within the maximum ratings. \$\endgroup\$
    – TimWescott
    Commented Jan 2 at 21:13
  • \$\begingroup\$ ah, sorry, I misread the rating suggested, didn't realize it was for gate-source voltage \$\endgroup\$
    – Leo
    Commented Jan 2 at 21:16
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Exceeding the G-S max voltage could be bad in two ways: if the FET has internal protection (e.g. zener diodes), and you limit the current with a resistor, it may not destroy the part. However, it may show high leakage and other undesirable effects.

If there is no internal protection, the overvoltage is likely to destroy the FET. In this case with the Nexperia part, since Nexperia isn't clearly pointing out such protection in the spec, that would be the likely result.

However, you could put a 10=12V zener in series with the cathode connected to the driving voltage and the anode connected to the gate, along with the G-S resistor. Then, when driven with 0V, there should only be 8-10V between the gate and source.

The reason the Vgs graphs only go to 4.5V is because the FET is well into saturation past that point.

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This PFET supports max Vgs +/-12V so zener diode voltage should be lower than this voltage for safe and reliable operation . Also 4.5V Vgs is sufficient to drive the Mosfet is full conduction ( saturation).

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    Commented Jan 5 at 12:31
  • \$\begingroup\$ (continued) That means in any post (like your answer here) connected in any way to Infineon or associated companies, products, websites etc. you need to include something like: "Disclosure: I work for Infineon". You need to be accurate in the disclosure statement, so please consider what you say. Please edit your answer to add that ASAP. (In case you were going to ask, having the word "Infineon" in your username is not enough, since usernames can be changed. The disclosure of being affiliated with something related to a post, needs to be a statement within the text of the post itself.) \$\endgroup\$
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    Commented Jan 5 at 12:31

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