I have a sensor interfaced to ADC but the Range I am getting is not enough, so now there are 2 options, Gain up the signal or Reduce ADC Gain. But as I heard it, reducing ADC gain will cause more noisy output, but then, can't I argue that applying gain to input signal will also gain up noise. are there more aspects than these which will cause noise if I reduce ADC Vref as compared to gaining up signal.
If you reduce the ADC Vref you will reduce the step voltage size of each bit you read. A some point the bit voltage size is close to the noise level of the existing circuit. You then need to add much filtering if you want a steady ADC reading. You may not be able to reduce the noise in the existing circuit.
On the other hand if you create a new amplifier circuit and increase the level of the input signal you might be able to keep amplifier circuit noise low and keep the 1 bit voltage level well above the noise, (also using a higher Vref).
Note that the noise being compared here is the existing circuit noise, not the noise mixed in with the signal to be measured. Even the Vref voltage will have some small noise in it.
You need to consider two main sources of noise:
ADC Code transition noise: This is the noise of the ADC which causes the ADC to output several codes for a constant input voltage. It does not change (in Volts) as the reference reduces, so the code transition noise (in LSBs) increases as the reference is dropped.
Input Amplifier noise: This is a constant voltage referred to the input of the amplifier. So it increases proportionally with the Gain. It can be reduced by analogue filtering.
In general though, reducing the ADC reference also increases the total noise at the output including the amplifier noise, whereas increasing the amplifier gain only increases its own noise, as shown below (where 'n' is the noise power).
A low noise ADC will have an ENOB (effective number of bits) close to its resolution e.g. 12bit ADC , 11.5bit ENOB (71dB SNR).