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Does anyone have any directions on what ICEs exist for MSP430s.

I currently use the MSP430F148. I have others in use, and plan to switch to some higher end in the future.

I would be interested in ICE or any other solutions people know of. We have some real time systems where power consumption is more important than speed(excluding the deadlines we must hit).

If anyone needs clarity on the question, just pop it in the note and I will try to revise this.

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It seems there are not any major ICEs available for the MSP430. I thought I had seen one, but cannot find it and find other places where people state there are not ICEs.

If this is incorrect, please post. Tomorrow I am going to accept my answer if there is not one. I will always go back and switch to an answer that has a real solution to what I need.

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I use the TI FET tool. I started out with the parallel port version but now use the USB FET430UIF. This has been used successfully with the F149 and the new F5438 and F5418 devices, programming over the full JTAG and Spy-Bi-Wire interfaces. I use the IAR tools but it is supported by all of the main development tools.

The only problem that I have come across is that when you upgrade your development system to the latest version it can update the FET firmware and driver. This can break compatibility with the old tool version, and returning to the older version is not easy.

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    \$\begingroup\$ I currently use the TI FET430UIF. The issue is that we have to break the code running to get data from the device. An ICE should have the ability to run normally without interruption and also dump critical values to me. \$\endgroup\$
    – Kortuk
    Commented Jul 22, 2010 at 14:04
  • \$\begingroup\$ If you have any information on how to set up my hardware to allow the USB FET to be more valuable would be well received though. \$\endgroup\$
    – Kortuk
    Commented Jul 22, 2010 at 14:06
  • \$\begingroup\$ I believe that this capability is beyond the scope of the TI debug interface built into the chip. The problem is that this sort of debug capability has a cost in silicon and power dissipation. As Horst Diewald said at a presentation I attended around the launch of the f5X devices, TI's overriding concern with this processor family is power consumption. This drove the chip design and the capabilities of the on chip diagnostics used for manufacturing verification. At least you can set breakpoints while the chip is running. \$\endgroup\$
    – uɐɪ
    Commented Jul 22, 2010 at 14:24
  • \$\begingroup\$ Yes, I am used to using the actual chips, sometimes people make an ICE to allow you to do far more advanced debugging with one very expensive and complicated device. \$\endgroup\$
    – Kortuk
    Commented Jul 23, 2010 at 21:11
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    \$\begingroup\$ This ICE sounds more like an ICD. \$\endgroup\$
    – J. Polfer
    Commented Oct 8, 2010 at 21:04

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