Cortex-M0 vs. Cortex-M0+ for an IoT sensor using LoRA [closed]

Question

Although I am an experienced software engineer, I am still quite a novice in electrical engineering. So please bare with me in explaining my requirements:

I have a small garden in my backyard and I would like to add a soil moisture sensor in the ground, connecting it with an RFM95W as a LoRaWAN node.

The sensor will likely take a measurement every 6 to 9 hours, and go to sleep to save battery life.

Whichever board I use will connect to another RFM95W that's a LoraWAN gateway hooked up to an Rpi inside my home, so that I can forward the data to a local LoRa Server (MQTT).

Eventually I hope to get to a point where the board will open a water source when the soil is dry (over PWM motor control -- which I have done with the Pi over bare metal before).

Secondly I hope to run some very basic deep learning on the data, directly on the MCU as discussed in this blog post

Therefore, choosing an ARM MCU seems like a good fit. There's the Cortex-M0 and its successor the M0+.

The problem I have in making the decision between them is based on the following:

1) The M0+ is marketed as a very power efficient MCU and therefore can work well with a battery for a long time

2) The M0 however seems to be very reasonably priced in its development boards, such as the SMT32F vs. the SAMD

Therefore I am wondering if the low power consumption is the case for the difference in price and if I can still get the same performance; i.e. long battery life, from the M0?

Answer 1

It's not really possible to answer this question accurately, because neither you nor the article you link to provide any sort of useful definition of 'deep learning'. Depending on who you talk to, this can encompass simple filtering and correlation work, all the way up to what DeepMind are doing. The term is ambigiuous to the point of being meaningless.

At a more practical level, there are very few differences between the M0 and M0+. While the M0+ has the potential to be more power efficient, the reality is that it depends much more heavily on the actual vendor implementation. On a very low power system peripherals and clock circuits can easy negate any power savings in the core itself. Most vendors have specific ranges of chips that are optimised for power saving, and you should just make your decision based on the characteristics of these chips - ignoring whether the internal implementation is an M0/M0+ or even any other Cortex M core.

One thing to note is that the M0/M0+ architecture is quite badly IO constrained, as it typically takes 2-3 instruction cycles to load/store a register from memory or IO. There is also no load/store pipelining as in the higher end Cortex chips. The result is that if you are doing a lot of bit bashing then an 8-bit processor can usually run rings around an M0/M0+. For example, flipping an IO port bit on the PIC12 can be done in 1 instruction cycle. On a Cortex M0/M0+ it would take between 5 and 7.

At the other end of the performance spectrum, this slowness of register transfers can also have a profound impact on the chip's ability to process large data sets (e.g. if you are implementing a filter or correlator). Going to something more powerful like an M3/M4 might actually gain you power efficiency under heavy math loads but you'd need to know a lot more about what analysis you plan to do before you could determine that.