The simplest answer is that all semiconductors used for digital logic outputs have some voltage drop across the two output electrodes, that there are practically always some stray currents, voltages and noise present on a line, in a circuit or at an input, and that waiting for an output or input to fall to absolute 0.00V makes a logic circuit slower.
Those issues have been steadily reduced as components and circuits got improved over the years, which has allowed decreasing the logic voltage levels and ranges while increasing speeds and decreasing power requirements, but they can't be completely eliminated, and thus some headroom needs to be allowed to counter them.
In an ideal world, a logic zero would be 0 volts, but an ideal and a practical/real world are not the same thing.
For BIPOLAR transistors like the NPN type used in the common emitter configuration, the voltage across the collector-emitter practically never reaches zero, and can be anywhere from 0.1V to 0.7V, possibly going higher in high speed and high current circuits.
With MOSFET transistors, the output voltage comes much closer to 0.0V but it still depends on:
- the MOSFET channel ON resistance (RDS(ON)), which in very small MOSFETS used in high-density ICs is higher than in high power discrete MOSFETS (which, in turn, are also slower)
- the current through the drain-source channel
- the speed of switching the MOSFET on and off
Since the higher speed circuits involve quickly changing the states of the individual elements of a digital circuit and charging and discharging parasitic capacitances, the very fast discharge of such a capacitance generates a high-current pulse which generates a higher voltage drop across a conducting element or a switch.
There is also some noise or voltage drops in the circuits or on the signal lines, which is never at an absolute zero volts, so allowing some level above 0.00V to be interpreted as 0 is necessary to make sure the digital logic circuit doesn't remain stuck at a logic 1 because the input never saw an absolute zero (of 0.00V).
Finally, an important thing that either you don't remember or your teacher didn't mention as a reason why we're going for even lower voltage levels range is that it also allows FASTER switching between the states (between 0 and 1), besides the lower power consumption.
Going from 0.2V to 2V will take longer than going from 0.2V to 1V, while also using more energy.
Even IF we can achieve 0.00V at a logic zero level AND properly interpret it, it will take a little longer than waiting for some level above 0.00V (like the 0.05V your teacher mentioned) which includes a "settling time" (the time required for the output to reach and steady within a given tolerance band), which will defeat the goal of increasing the logic circuit speeds.
As my practical advice, I recommend you try using a high resolution digital voltmeter (more than 4 digits) and you will see the further you go from the decimal point to the right, the more unsteady those digits become, and you can even measure a small voltage in a short-circuit, due to galvanic junction, stray induced currents or voltages and the inherent noise in the input of the voltmeter or any instrument for that matter.
Also, the neutral or zero in power lines is almost never 0.00V, due to circuit currents travelling through it, stray voltages and currents induced in it, or any other factors. Try sticking a piece of metal into the ground and measuring the AC voltage between the ground and the neutral wire, and you will see that it is not really at a zero compared to ground.
That will help you understand why an absolute zero is a very rare occurrence in practice.