Solution to detect bad vias in production process

Question

I face the problem of damaged (cracked) vias in a rigid/flex assembly.

It is very difficult to detect those defects before mounting the assembly. Products with cracked vias may fail during lifetime while early detection seems difficult.

The manufacturer of the PCBA is testing all tracks according to A 600 class 3, which means, any track with less than 10 Ω is considered ok. However nominal values for tracks are only mΩs. Which means, testing acc. A 600 cannot detect moderate resistance deviations.

Current interim solution is to connect all tracks of the assembly in series by connecting it to a test adapter and to measure the series resistance. It is then compared to an arbitrary threshold for good/bad decision. This causes a high scrap rate of PCBAs which probably don't bear a defect. I.e. it is a test with a very bad specificity.

Is there a testing method for PCBA manufacturers to find defect vias within PCBAs? Is X-ray a way?

Answer 1

There are a number of reasons for cracked vias and virtually all of them are caused, to a greater or lesser degree, by CTE issues.

Looking at this datasheet (a very commonly used material in the high reliability sector) we can see that below Tg the CTE in the Z axis is typically 45 ppm / K (*) but in the X and Y axes it is typically 13 to 14 ppm / K.

Above Tg (which it will definitely encounter in reflow) the Z axis CTE rises to 230 ppm / K, a rather large increase.

The time above Tg is therefore critical for via reliability; the higher the Tg of the material, the lower the risk of cracked vias (because the time above Tg is minimised); a lower Tg material may be suitable if there are no dense via fields. You can find a description of standard materials here.

Rigiflex assemblies also have their own unique issues particularly if a coverlay is used. These materials are often used to protect the flex section of a PCB, but the Tg of this material is only about 40C (ask me how I know) so if a via goes through the coverlay then even under moderate temperature cycling, vias can be destroyed (they get spread sideways within the coverlay).

Putting vias through a coverlay is asking for trouble.

If you have a high density (even locally) of vias, then you should consider using a high Tg laminate material.

Testing for open circuits at an elevated temperature is likely to find the majority of via problems; I would start out at perhaps 50C and let the unit soak.

[Update to address X-Ray]

X-Ray is both expensive and time consuming and most (if not all) PCB laminate vendors do not have a machine (if they do their own assembly as well, they may have one); even then, X-Ray will be of limited (probably very low) value in trying to find a needle in a haystack (if you know where the broken vias tend to be it may help a little).

In a dense via field, even X-Ray at an angle will not be able to 'see' within the field effectively, if at all, so X-Ray really won't solve the problem for you.

X-Ray equipment also requires proper training and safety procedures.

(*) K = Kelvin

Answer 2

I can't post comments due to my low reputation, but I thought the idea may still be worth sharing.

As others pointed out, cracks can reveal themselves when the board is thermal cycled. Inspecting the vias visually to find these cracks doesn't scale well, but you already have a testing method that's sensitive to discontinuities in the conductor. I suggest combining the two: measuring resistance at room temperature, then heating the board, then measuring the resistance again while it's still hot. I believe damaged boards will exhibit a much larger difference between the measurements than the ones without cracks. This test should also be less sensitive to track thickness variability, as it uses the room temperature resistance as a baseline and only looks at the resistance increase between cold and hot.

This is a simple testing method that ought to be cheaper and easier to implement than X-ray examination, and I believe that with X-ray, visual inspection (of radiographs) would remain an issue.