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USB Type-C is able to provide up to 5A. When I look at trace width guidelines, I find my traces have to be 110mil/2.79mm wide for 1oz default traces. The thing is, 100mil is literally more than 5 pins of Type-C including distance between them. It's like 1/3 of the entire Type-C connector. I've never built circuit that can have such current, so I'm looking for advice from more experienced people.

What would be the correct way to implement Type-C port with high current? At least 3A, up to 5A would be best. Type-C has 4 VBus pins. So this is my list of the questions, I would appreciate, if you could give an advice and explain why it has to be certain way, please.

  1. Do I need to connect all VBUS pins together on my PCB?
  2. How wide should my traces be?
  3. They can't be wide near the pins themselves, how do I organize it then so that I don't burn anything?

Unfortunately, googling it only gives general guidelines like "so many amps - trace this wide". I tried several synonymous searches, but couldn't find any lead. It doesn't really discuss the narrow-pin-bottleneck of the Type-C port. I'm pretty sure it's hidden somewhere in power delivery specs or something, but I couldn't google out the exact part, and from what I remember, USB specs now compete with "War and Peace" in volume. But a link to the spec, if it contains an answer to my question, would also be appreciated. Thank you!

enter image description here

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For the main route

Use a trace width calculator like this: -

enter image description here

I've assumed certain things such a trace length but, for an external copper surface, the required trace width is only 58.3 mils (purple). For an internal layer (red result) it's 150 mils.

For the end points of the route

Because you get the power dissipation figure you can estimate (in sections) what sort of power is dissipated when you "thin-down" the trace when it reaches the end-points of the circuit.

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  • \$\begingroup\$ unfortunately, it's exactly what I've done and this information is no help at all. Traces of this width are physically impossible to implement with Type-C. Recommended trace width is 1/3 of the entire connector (12 pins!). How do I connect to a narrow trace of Type-C pin without burning it? \$\endgroup\$
    – Ilya
    Jun 29 '20 at 14:49
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    \$\begingroup\$ Did you read my final paragraph? \$\endgroup\$
    – Andy aka
    Jun 29 '20 at 14:52
  • \$\begingroup\$ I'm sorry, that sort of calculation is beyond my level. I guess there has to be at least some rule of thumb. Do you have any link about it? \$\endgroup\$
    – Ilya
    Jun 29 '20 at 18:51
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    \$\begingroup\$ Just piece it together. Start at the maximum trace width at the pad of the connector and make the trace length 1 mm long. Record the dissipation power then add-on another 1mm trace length at double the width. Totalize the power and step and repeat totalizing all the powers as trace length gets 1 mm longer and wider until it's 150 mil wide. In other words, construct a triangle from miniature pieces of ever widening track then if the power is less than around 100 mW I wouldn't worry about it. Use your imagination and try harder. \$\endgroup\$
    – Andy aka
    Jun 29 '20 at 21:53
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    \$\begingroup\$ @Ilya if there are four pins carrying the current then use them all for sure. \$\endgroup\$
    – Andy aka
    Jun 30 '20 at 9:06
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Vias right next to each VBUS pin (probably several) and a copper pour on a buried plane, nobody is doing USB C on two layer boards. Don't forget that the ground path has to be equally solid.

Don't forget also that allowing more then a 10 degree rise might be acceptable, and that more then 1oz copper is a thing.

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  • \$\begingroup\$ So I can have pretty much a board layer dedicated to power and a layer for ground? I have to say that does sound like a good idea. Thank you! \$\endgroup\$
    – Ilya
    Jun 30 '20 at 8:56
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    \$\begingroup\$ @llya You almost always want at least one ground plane layer in any design that runs reasonably high speed edges, and even USB2 counts as reasonably high speed, and at least one power plane layer is entirely normal on anything 4 layers or up. \$\endgroup\$
    – Dan Mills
    Jun 30 '20 at 12:06
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    \$\begingroup\$ @Ilya Type-C ports with 5 A load can be reasonably implemented only on 6-layer board and above. Forget 4-layer. \$\endgroup\$ Jul 1 '20 at 7:15
  • \$\begingroup\$ and you happened to be a USB expert, wow. Thank you for your contribution! \$\endgroup\$
    – Ilya
    Jul 1 '20 at 8:10
  • \$\begingroup\$ @Ilya Not really, but high speed board layout I do know. \$\endgroup\$
    – Dan Mills
    Jul 1 '20 at 12:23

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