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enter image description here

The question is for this circuit is, explain why some values for Rload, make voltage regulation worse? Rsrc = 470 ohms, diode is a 1N914, Vsrc = 3, 4 , 5 volts for 3 different resistor load values such as = 470 ohms , 1k ohms and 2.2k ohms. 1k ohms had a more constant voltage rather than the 470 or the 2.2k.

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    \$\begingroup\$ Is this a homework assignment? If so, do you already have a starting point for what to consider? Have you attempted to simulate this circuit with various load resistances to better understand its behaviour? \$\endgroup\$ – nanofarad Sep 18 '20 at 0:42
  • \$\begingroup\$ I have, and yes this a question in my homework assignment, where I try multiple Rloads with different input voltages, to see which one has less fluctuation throughout the experiment, but I don't know the precise reason why. \$\endgroup\$ – abdullaziz five Sep 18 '20 at 0:57
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    \$\begingroup\$ Sounds good--can you include your findings so far as well as the values of Vsrc and Rsrc you used, as well as the Rload values that lead to fluctuation? \$\endgroup\$ – nanofarad Sep 18 '20 at 0:59
  • \$\begingroup\$ Look at the V-I curve of a diode. There's an area where the voltage is very constant over current (good regulation), and an area where it isn't. Can you find an Rload value that puts the diodes in their unhappy area? \$\endgroup\$ – td127 Sep 18 '20 at 1:02
  • \$\begingroup\$ @abdullazizfive Are you aware of the Thevenin equivalent method as applied to resistor dividers? The problem becomes fairly easy to see, if so. \$\endgroup\$ – jonk Sep 18 '20 at 5:18
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Perhaps the easiest way to see is to re-draw the schematic. If there is one thing I try to do, over and over again, it is hammer at this with everyone I reach out to. I recommend early and continual practice at redrawing circuits to novitiates in electronics. It's an essential skill and it takes regular practice in order to yield some of its greater powers. (And see the appendix below for more details about it.)

Your schematic, redrawn, is just this:

schematic

simulate this circuit – Schematic created using CircuitLab

Note that the right side presents a dead-simple approach. It's now completely obvious that when \$V_\text{TH}\$ is less than the required voltage for the three diodes, that there is no possible way that any current flows in the diodes. (Assuming an ideal diode voltage, anyway.)

If the diodes are to be modeled using the Shockley equation, then the result is somewhat more complex (diodes always conduct when forward-biased, then, but the formula is a little more complex.) Either way, the problem is now less worrisome.

So learn to redraw schematics.

The formula for the Thevenin voltage is:

$$V_\text{TH}=V_\text{SRC}\cdot \frac{R_\text{LOAD}}{R_\text{LOAD}+R_{SRC}}$$

When using ideal diodes with non-zero voltages, the only question you have to answer is if \$V_\text{TH}\gt 3\cdot V_\text{D}\$, where \$V_\text{D}\$ is the ideal diode voltage where it begins to conduct.

If that test isn't met, then there is insufficient voltage and the diodes don't conduct and then you are left with only with the original resistor divider without the diodes. At that point, it is rather obvious why the regulation is poor as the voltage across the load is a function of the load itself.

If that test is met, then the diodes conduct and they will maintain that ideal voltage across themselves and the voltage across the load will be constant. That is, of course, until the load itself changes in such a way to cause \$V_\text{TH}\lt 3\cdot V_\text{D}\$, of course.

In the ideal diode case, then that regulation occurs when:

$$R_\text{LOAD}\gt R_\text{SRC}\cdot \frac{3\cdot V_\text{D}}{V_\text{SRC}-3\cdot V_\text{D}}, \text{ where }V_\text{SRC}\gt 3\cdot V_\text{D}$$

If the diodes are not ideal, but real, then they follow the Shockley equation where:

$$V_\text{D}=V_T\cdot\ln\left(1+\frac{I_\text{D}}{I_\text{SAT}}\right)$$

In this more complex case, the regulation equation is far more complex. Set \$V_{TK}=3\cdot V_T\cdot\left(1+\frac{R_\text{SRC}}{R_\text{LOAD}}\right)\$, \$\zeta=\frac{I_\text{SAT}\cdot R_\text{SRC}}{V_\text{TK}}\$, and \$k=\operatorname{LambertW}\left(\zeta\cdot e^{^\left[\frac{V_\text{SRC}}{V_\text{TK}}\right]}\right)\$, then:

$$\frac{\% V_\text{LOAD}}{\% R_\text{LOAD}}=\frac{R_\text{SRC}}{\left(R_\text{LOAD}+R_\text{SRC}\right)\cdot \left(1+k\right)}$$

Or else,

$$\% V_\text{LOAD}=\left[\frac{R_\text{SRC}}{\left(R_\text{LOAD}+R_\text{SRC}\right)\cdot \left(1+k\right)}\right]\cdot \% R_\text{LOAD}$$

Here, the factor, \$z=\left[\frac{R_\text{SRC}}{\left(R_\text{LOAD}+R_\text{SRC}\right)\cdot \left(1+k\right)}\right]\$, tells you how well regulated \$V_\text{LOAD}\$ is. Small values of \$z\$ will mean good regulation. Larger values of \$z\$ will mean poorer regulation. (Obviously, while that focuses on the regulation, it doesn't tell you what that regulation voltage is. That voltage will itself depend upon the current remaining in the diodes.)

Obviously, if you include the more realistic Shockley diode equation the regulation factor is a little more complicated. But if you use some idealization of the diode voltage, then the problem is a lot easier to work out.

Redrawing Schematic Appendix

One of the better ways to try and understand a circuit that at first appears to be confusing is to redraw it. There are some rules you can follow that will help get a leg-up on learning that process. But there are also some added personal skills that gradually develop over time, too.

I first learned these rules in 1980, taking a Tektronix class that was offered only to its employees. This class was meant to teach electronics drafting to people who were not electronics engineers, but instead would be trained sufficiently to help draft schematics for their manuals.

The nice thing about the rules is that you don't have to be an expert to follow them. And that if you follow them, even blindly almost, that the resulting schematics really are easier to figure out.

The rules are:

  • Arrange the schematic so that conventional current appears to flow from the top towards the bottom of the schematic sheet. I like to imagine this as a kind of curtain (if you prefer a more static concept) or waterfall (if you prefer a more dynamic concept) of charges moving from the top edge down to the bottom edge. This is a kind of flow of energy that doesn't do any useful work by itself, but provides the environment for useful work to get done.
  • Arrange the schematic so that signals of interest flow from the left side of the schematic to the right side. Inputs will then generally be on the left, outputs generally will be on the right.
  • Do not "bus" power around. In short, if a lead of a component goes to ground or some other voltage rail, do not use a wire to connect it to other component leads that also go to the same rail/ground. Instead, simply show a node name like "Vcc" and stop. Busing power around on a schematic is almost guaranteed to make the schematic less understandable, not more. (There are times when professionals need to communicate something unique about a voltage rail bus to other professionals. So there are exceptions at times to this rule. But when trying to understand a confusing schematic, the situation isn't that one and such an argument "by professionals, to professionals" still fails here. So just don't do it.) This one takes a moment to grasp fully. There is a strong tendency to want to show all of the wires that are involved in soldering up a circuit. Resist that tendency. The idea here is that wires needed to make a circuit can be distracting. And while they may be needed to make the circuit work, they do NOT help you understand the circuit. In fact, they do the exact opposite. So remove such wires and just show connections to the rails and stop.
  • Try to organize the schematic around cohesion. It is almost always possible to "tease apart" a schematic so that there are knots of components that are tightly connected, each to another, separated then by only a few wires going to other knots. If you can find these, emphasize them by isolating the knots and focusing on drawing each one in some meaningful way, first. Don't even think about the whole schematic. Just focus on getting each cohesive section "looking right" by itself. Then add in the spare wiring or few components separating these "natural divisions" in the schematic. This will often tend to almost magically find distinct functions that are easier to understand, which then "communicate" with each other via relatively easier to understand connections between them.

The above rules aren't hard and fast. But if you struggle to follow them, you'll find that it does help a lot.

You can read a snippet of my own education by those schematic draftsmen at Tektronix who trained me by reading here.

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jonk's answer is quite good, but you don't need the diodes to get the right answer.

There are two kinds of sources - voltage and current sources, and there are well known equivalent circuit diagrams for that

Sources

So the case of the voltage source is similar to your circuit. The sources current is the same through Ri and the Load. a small current can result in a large Voltage at a resistor. The Goal is here, the voltage at the Load should be almost equal to the source (and const). So if the Load resistor is large compared to Ri any change in current (regulation) will only cause a small voltage change at Ri, most of the voltage will be present at the load. If the Load resistor is small compared to Ri, any regulation current will result in huge voltage changes at the load.

This is why you want Ri to be small compared to the load.


Then again, the current source everything is reversed... you want Ri to be large, so all the current goes through load


Your circuit is a combination of both cases, and even as your current source Ri are diodes = "non linear resistors" you can assume that both cases meet in the middle somewhere. so it's not the smallest Rsrc in your diagram which is the best but a value in the middle

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