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Below is a simple simulation to demonstrate a differential pair operation:

enter image description here

x is the node for V(x) and a and b are nodes for the difference voltage V(a,b).

Vx is the total signal Vd + Vcm. Vd can be the wanted sensor signal and Vcm represents the unwanted 50Hz common mode interference. And if you look at the plot and compare red and green plots we can see that the SNR and CMRR is good because Vd is amplified but Vcm is not amplified and also subtracted. This can be seen if we plot a and b separately as follows:

enter image description here

So that also means that in the above case we still increase SNR a lot even though we don't take the Va-Vb but only Va as output. It seems this is only because the diffential gain is much greater than the CM gain. So one may be satisfied to use only Va and couple it to a single ended ADC.

But if the differential gain were only one(unity), then taking Va would not help and in that case we would really need Va - Vb to eliminate the Vcm at the output.

My question is, can there be a passive stage which can subtract Va from Vb? For instance if we have a single channel single ended ADC(or single channel scope with single ended probe), what stage can subtract Va from Vb? (not digital subtraction as in a two channel scope or ADC)

Edit to an answer:

Circuits:

enter image description here

Tail currents and outputs:

enter image description here

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The circuit topology that most OpAmps use for their input stage is a differential transconductance amplifier, not a differential voltage amplifier.

A transconductance amplifier turns an input voltage into a proportional output current. The advantage is that currents can be added (and subtracted) very easily by just connecting the current sources together. In your circuit, the difference of Q1's and Q2's collector current is exactly proportional to the differential input voltage. If you somehow subtract these currents from each other, you're left with a single current that's proportional to only the differential input voltage and completely independent from the common-mode voltage. Put that current through a resistor and you've got your output voltage.

Here's a small-ish circuit that does exactly that (should operate from +/-5V to about +/-15V):

schematic

simulate this circuit – Schematic created using CircuitLab

The collector currents produced by the input stage get fed into a bunch of current mirrors, and in the end, those currents get subtracted from each other at the collectors of Q4 and Q8. (Q8 sources a current equal to Q2's collector current, while Q4 sinks a current equal to Q1's collector current.) The resulting "excess" (difference) current flows through R10 and produces an output voltage that's exactly 10 times the differential input voltage, with very high CMRR. As an added bonus, it's also referred directly to ground.

If you want to adjust the gain, you just have to change R10. Additionally, the input differential voltage range is limited to I1 * R1. If you want a higher input voltage range, you'll have to increase R1 and R2.

You can replace current source I1 with a resistor, too, with little effect on the circuit's CMRR.

This configuration is similar to a "folded cascode" OpAmp input stage.

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One very common way to get a single ended output is to use the stage below.

schematic

simulate this circuit – Schematic created using CircuitLab

Intuitively, you can see that both output currents will be added to double the output voltage gain. From in vin+, the half of the current common mode component will be inverted, thus being subtracted out at the output.

A very common-implementation normally includes a common-emitter stage as a 2nd stage to get a large voltage gain.

EDIT: Current source implementation

The current source can be as simple as the following:

schematic

simulate this circuit

The resistors values are indicative only, I'll leave the calculations up to you. V_cs is the top of the current source.

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  • \$\begingroup\$ Can this be modified so that it doesn't saturate ? The first half of the output saturating for a 1mV sine input. \$\endgroup\$
    – ty_1917
    Commented Dec 29, 2022 at 18:47
  • \$\begingroup\$ And is this a stage after the stage in my question or a replacement to the one in the question? \$\endgroup\$
    – ty_1917
    Commented Dec 29, 2022 at 18:50
  • \$\begingroup\$ What is your final aim? Normally, this stage is used with feedback around it, and if you add another second stage, the 1st stage will most likely not saturate since you'll be amplifying an error signal (which is small assuming a large loop gain) rather than the signal itself. If, for some reason you want to do some experiment without using typical voltage feedback, you can use "emitter degeneration" , or local series-series feedback...basically, add resistor in series with the emitter and get some stable (but smaller) differential gain. \$\endgroup\$
    – Designalog
    Commented Dec 29, 2022 at 18:51
  • \$\begingroup\$ Adding 10k resistors in series with the emitter solved the issue. \$\endgroup\$
    – ty_1917
    Commented Dec 29, 2022 at 18:52
  • \$\begingroup\$ What could be a stable current sink implementation in this case? To implement the current sink in your diagram. \$\endgroup\$
    – ty_1917
    Commented Dec 29, 2022 at 19:12

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