I'm having a really hard time finding references on this for some reason, but take for example page 11: High Speed USB Platform Design Guidelines - Intel
(I know I've seen documents illustrating the (dramatic!) effect of inappropriately chosen CMCs, but I cannot find it. If someone knows what I'm talking about, please don't hesitate to comment a link!)
USB is NOT a balanced, differential signaling standard: it very explicitly makes use of unbalanced symbols ('J' and 'K' in the standard's terminology) to indicate line status. The impedance also varies with mode:
- In Full Speed mode, transmission uses plain old LVCMOS logic drivers, and the receiver is open circuit (well, a small capacitance). While a differential receiver offers a little signal quality improvement (I'm not actually sure if they really do use differential here -- I wouldn't be surprised if not, but I've certainly not seen the proprietary "secret sauce" inside such a chip), mainly it's for reduced emissions -- worthwhile given the large signal swing (3.3V) and often poor grounding of well-used connectors.
- In High Speed mode, signaling is common-ground, with a shunt termination resistor switched in at each end (from each line to ground -- not between lines), a burst of alternating JK symbols is used to start a transaction (or calibrate the receiver or something -- I've not read the standard in a while, I've forgotten the exact function I'm afraid).
It would be nice to apply common mode filtering, but the variable impedance makes it difficult to employ any filtering at all, and we can only employ as much as the maximum mode we wish to support:
- In Full Speed, the CM impedance can be such that the time constant is less than a bit time, when combined with the maximum line length (namely, its capacitance). In other words, giving a cutoff in the range of 30MHz. But notice it depends entirely on line length, because the receiver offers no loading (it's high impedance) by itself. We could emulate line capacitance by adding RC shunt elements at each end -- but only at expense to signal level. In short, this is at best a hack, and precludes High Speed mode.
- In High Speed, impedance at least is well defined, but the JK symbols are accordingly faster. Only very little impedance can be used -- comparable to the CM impedance itself. Typically a 90Ω @ 100MHz part is used (if any at all). Note line length doesn't factor into the calculation because it's doubly terminated. Such a CMC nets some improvement (emissions and susceptibility) at high frequencies (>100s MHz), primarily at expense to J/K signal quality.
Note that if ZCM = 45Ω and the choke is 90Ω @ 100MHz, then (at 100MHz) we have an impedance divider giving merely 10dB attenuation. (Generally these CMCs have impedance rising with frequency around 100MHz, so the attenuation will be higher above there.)
Related: Shielding
Because USB is not strictly balanced, it cannot be ran over unshielded pair for example, and indeed shielding is a critical part of its basic function. The receiver CM range is likewise only within the supply rails, not tolerant of any external interference coupled in. (High Speed is probably even worse than that, given the resistors pulling the line near 0V -- but again, alas, I don't know what they actually use for receivers.)
This shielding mandate extends between both transceivers, from DP/DM with respect to chip GND, over any CMCs between them, and up into and through each connector. I emphasize this to highlight another common error: impedance to the shield/ground. Many application notes suggest e.g. a ferrite bead between shield ground and circuit ground, without also providing a proper RF ground-return path between circuit ground (which is driving real signal energy into the common mode!) and shield ground (the ground reference for signals in the cable). A CMC on the data pair functions similarly to impedance between circuit and shield grounds, so it is no accident that both good shielding and little CM choking are required.
What to do?
Ferrite bead on the cable -- around the shield, and thus by extension everything else inside. Simple as that!
A cable ferrite also provides CM impedance, especially resistance that dampens resonances. This doesn't improve emissions/susceptibility much by itself (ZCM of a cable through space is in the ballpark of 150Ω, while single ferrite beads are usually 30-300Ω), but does knock down the peaks (resonances) which can otherwise have an outsized effect in narrow frequency bands.
Tie the shield to circuit ground, or at worst chassis ground, with an AC path to circuit ground nearby.
Quite often, no chassis is present, and the shield can (should!) be tied into the PCB ground plane. At worst, galvanic separation can be implemented by using multiple capacitors per ground pin, spaced out around the connector housing -- this minimizes inductance between shield and GND. But I'm not aware of any USB device anywhere that doesn't connect PGND with SHIELD, so this will likely be a special case practice.
Power Lines?
They don't matter -- typically GND should still be tied with GND, and VBUS can have impedance (a series ferrite bead* or inductor) or be bypassed to GND as well. You see it both ways (or both at once i.e. a tee or pi filter!) and I don't think anyone cares what difference it makes.
*But mind that most ferrite beads saturate at low currents, even below the 500mA of un-negotiated USB; always check the bias characteristics!
What is the effect, anyway?
- Low impedance bypass at both ends of VBUS, allows standing waves on the wire.
- A ferrite bead offers comparable or high impedance (including resistance) which tends to dampen this mode.
There's nothing obviously coupling into this mode (DP/DM are generally screened separately from VBUS/GND), so it's really only of consequence to supply ripple. And the cutoff frequency of this equivalent LC filter can be forced low enough that you might not care.
Personally, I would prefer (proffer?) a modestly-low impedance: use a lossy bulk capacitor, like 1-10uF ceramic plus 1Ω external ESR, or a single tantalum/electrolytic of the same values.
(This also anticipates, or answers in part, your other question: USB 2.0 VBUS Filter )
Also, if you do use a CMC on each data line, do they need to share a common core?
Just to clarify -- there's no such thing as a "CMC" on a single line; that would be normal mode, i.e., a plain old (two terminal) ferrite bead or what have you. Uncoupled chokes would simply attenuate the differential signal itself, as much as common mode.
Which, considering the small values that could be used here (10s of ohms) -- you can probably get away with that, but it will reduce your maximum cable length and noise margins, i.e., the eye diagram will be strictly more closed.
Cheers!
