I am trying to make a circuit that pulls the output to VCC for 5 seconds, then pulls the output low for 2 seconds, then latches the output to VCC.
I was thinking about doing this with a 555 timer in a monostable multivibrator configuration. This gets me the on for 5 then off functionality I want, but how do I implement the latching high after 2 seconds off? I also want the eventual device to be as small as possible.
Additional info:
VCC = 5 V
Io = 1 A
It sounds like you are trying to reset a USB device (5V 1A). If you want the smallest implementation possible, I believe your best bet would be using a small microcontroller such as the ATTINY85 and a low-side MOSFET (NFET), to connect and disconnect the ground from the load. The ATTINY85 has an internal oscillator which can give you time measurements well within 1s resolution you are looking for (it is an 8MHz oscillator I believe). For the N-MOSFET, simply choose one that is rated for your current and voltage requirements, and can be driven using the 5V GPIO from the ATTINY.
This MCU and FET combination would relieve you of any calculations and extra components for your 555 timer, and would rely on the same power source for your 5V 1A device. The ATTINY also requires almost no extra components to operate (probably a single bypass capacitor) if you want to implement just the IC, but a dev board can be used which also includes programming circuitry (FTDI) or Arduino compatibility. Furthermore, the ATTINY can be bought in the same SOIC-8 footprint as your 555 timer and can be programmed to do any arbitrary start sequence for your load upon power-up.
There would be several ways to do this, one is with a small microcontroller as described in another answer. This would likely be the smallest foot print but there would be a bit of coding to learn plus the requirements of a simple programmer. Most small modern EEPROM micro-controllers (e.g.: Attiny, PIC, etc), these days also contain a few analog inputs so you could even add one or two potentiometers to allow for timing variations.
If you would rather go with a more analog route there is of course the 555 and 556 timer chips, (there is even a CMOS 555 version). Yet another option is self contained one shot (multi-vibrators) from the older digital TTL/CMOS types, (for e.g.: 74221, 74121, CD14528, CD14538, CD4047), These digital multi-vibrators can be more versatie than the 555 as they have high and low inputs and outputs that would help minimize the need for extra logic. Most are also dual timers (similar to the 556). With long timing periods however the TTL/CMOS timers may have less accuracy.
Below is a simplified diagram of how a pair of 555s (or one 556) could be used for your multi-pulse application. Note that you would still need to design the triggering input circuit that starts off the timing sequence, plus the other standard parts to operate the 555 circuits.
simulate this circuit – Schematic created using CircuitLab
This has come up occasionally over the years. I have several flavors from other postings that have a delay before the first of two pulses. You don't want that initial delay, which makes things easier.
Consider this:
This is a single CMOS gate in an SOT-23 package; very small, but hand-solderable. It is a 2-input NAND gate with Schmitt Trigger inputs. This, plus 2 R's and 2 C's, driving a n-channel power MOSFET in the GND leg, will do what you want. If you don't want to "switch the ground", a second gate gets you the correct drive for a p-channel FET in the Vcc line.
One R-C sets the first ON time for the first power pulse. The other R-C sets the delay before the circuit turns on the FET continuously. The time gap between the end of the first power pulse and the end of the delay is the off time.
Add one more small capacitor as power supply decoupling.
No coding, no compiling, no programming and no <gasp!> 555.
UPDATE: Here is the promised schematic. R1-C1 set the initial power pulse of around 4.8 s. R2-C2 set the delay from when power is applied to the circuit until the output transistor is turned on continuously. This is set to 7 S, so the unpowered gap between the two timers is around 2 s.
R3 provides a discharge path for the two timing capacitors when the system is off. For both timers to be accurate, the power to the circuit must be off for around 20 seconds (3 time constants for the longer timer). If this is too long, adding a small signal diode across C1 and C2 will decrease greatly the minimum recycle time. Q1 is a place-holder. It should be a power MOSFET capable of at least 2 A.
NOTE: If you don't want to mess with hand construction with an SMT component, there is another approach that uses an LM393 dual comparator in a normal DIP package. Same number of passive components around it, but doing different things.
This is a different approach, so I'm posting it as a separate answer.
Another way to generate sequential delays that cannot overlap is with a timing ramp and comparators; basically, how a 555 operates internally.
In this circuit, R1-C1 generates an exponential ramp waveform with a time constant of 5 seconds. Thus, at 5 seconds, the voltage at C1 will be 63% of Vcc. R2-R3-R4 is the reference generator, and produces the trip points for the two comparators. For the FET to turn on at 5 s, adjust the voltage at the R3 wiper for 63% of Vcc. Below this voltage, U1 pin 1 will be low and the FET will be on. Above this voltage, U1A pin 1 will high (pulled up by R5) and the FET will be off.
The FET stays off as the ram voltage continues to increase. When it crosses the voltage at the R3 wiper, U1 pin 7 goes low, turning on the FET. For a 7 second total delay (5 seconds on followed by 2 seconds off), adjust the voltage at the R4 wiper for 75% of Vcc. This equated to 1.4 time constants. The FET stays on until power is removed from the circuit.
R5 assures a rapid and complete turn-off of the FET.
Normally, once you're sure of two time periods, R2 and R3 would be fixed resistors, with the comparators connected to the R2-R3 and R3-R4 nodes. The math isn't complex, but it is messy because both trip points are dependent on all three resistor values. The equation and a calculator are here:
https://www.allaboutcircuits.com/tools/resistor-capacitor-time-constant-calculator/
As an alternative way to tune things, two pots get you two non-interacting adjustments. They allow you to adjust the initial power pulse width and the off time between power phases independently. R4 was selected to place the voltage at the R2-R3 node half way between the voltages for 5 s and 7 s of ramp time.
