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I need to select a microcontroller for an application. The specific requirement came from the firmware team is that the I2C present in the microcontroller should support clock stretching.

This microcontroller will be used in a TFT display so clock stretching is mandatory (from firmware team).

  1. How do I make sure that the I2C present in the microcontroller supports clock stretching?

For example: I selected this microcontroller. In the I2C section I can see the word "stretch". I am sure that just by seeing the word "stretch" I can't confirm the controller supports I2C clock stretching.

Below is the information about I2C in the example microcontroller.

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enter image description here

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    \$\begingroup\$ Usually if they say the minimum frequency is 0Hz (and/or there's no maximum time for the low period of the clock), that indicates it is clock stretching compatible, but I think the only way to know for sure is if it says something about stretching in the datasheet, or app notes, or forums, or contacting the manufacturer \$\endgroup\$
    – BeB00
    Commented Feb 21 at 8:49
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    \$\begingroup\$ Analogkid, First question is... What's the maximum rate? You can do clock stretching of any kind if you don't use the hardware peripherals and instead use timers, software, and a state machine. (Peripheral hardware buys speed.) But... data rates matter then. So what are the actual requirements here? \$\endgroup\$
    – periblepsis
    Commented Feb 21 at 9:36
  • \$\begingroup\$ This is for TFT display.I belive the speed will be very lesll like 400 Kbps. \$\endgroup\$
    – Confused
    Commented Feb 21 at 10:04

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Clock stretching is part of the convention.

In simple words is means that all devices on SCL are allowed to hold the line actively at LOW. Commonly a device holds the line (pun intended) to gain some time for internal processing. Only if all devices are fine to release SCL, it will rise to HIGH to designate the next data bit.

Unfortunately, user manual and detailed documents for the MCU are behind a "pay wall," so this statement is the publicly visible source of conformance:

The LPI2C implements logic support for standard-mode, fast-mode, fast-mode plus and ultra-fast modes of operation.

(Chapter 2.2.11 of this data sheet.)

This claim tells me that clock stretching is supported.

Important hints are the minimum clock. The excerpts you show say "0 kHz," which means that it can be down to static.

The note you marked is also a hint that clock stretching is taken for granted.

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    \$\begingroup\$ you mean this line "The LPI2C module provides a low power IIC module that can operate in low power stop modes if required" \$\endgroup\$
    – Confused
    Commented Feb 22 at 14:15
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    \$\begingroup\$ "Low power stop mode" has nothing to do with clock stretching. Unfortunately such terms are mostly invented by marketroids and have no specific definition. Without the detailed user manual we cannot say what this means. \$\endgroup\$
    – the busybee
    Commented Feb 22 at 14:22

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