I am designing a circuit using the KSZ8081RNAIA Ethernet PHY, and I have a question regarding the use of pin 23 (LED pin). The datasheet can be found here.
As I understand it, pin 23 is a strap-in pin where the digital state gets latched at chip reset, after which it functions as an output pin. I plan to pull this pin high at chip reset and then use it to control a two-color LED. I’ve attached the circuit for reference.
In my design, at chip reset, the PNP transistor sets the pin to around 2.65V to configure it, and afterward, this pin drives the dual LED as an output.
Do you see any potential issues with this circuit design? Are there any ways to improve it?
Thanks.