I dug out some old notes and I don't think I figured out the answer to this exact question using SDC constraints. I ended up solving the problem by (1) enforcing a multiplexer with gated inverters by // pragma map_to_mux on the ? operator, (2) using Tcl commands instead of SDC constraints: set_clock_gating_check -low my_mux_instance/q0 and set_clock_gating_check -high my_mux_instance/q1, (3) there was some trial and error

Could you add the declarations of state, din, and N to your code?

Adding another register for debug isn't quite necessary.

@RobhercKV5ROB: Exactly. And I want to specify the rules which make the mismatch illegal.

@RobhercKV5ROB: I've updated the question to illustrate what the problem is.

Thanks for your input. But isn't what you describe just accomplished by using D flip-flops as shown in my drawing?