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@user345919 This site might give you an idea on how it works. There are also two papers referenced at the bottom that may be of help. One of them shows an implementation of a multi-tau correlator on FPGA, though there are many other implementations out there and even some with easily accessible open-source code. There are also some software implementations that may give you a better idea on how multi-tau works. There are a ton more papers out there on multi-tau if you google.
Do you need the whole correlation? If you can make do with not calculating every tau you may consider a multi-tau correlation which can save a significant amount of resources.
@KevinWhite In the bad state where the output goes to +40v(or -), VCC2 is 40v, VEE2 is ~12v. It doesn't seems to me like the issue is with the bootstrapping.
So it seems like 1 & 2 aren't directly causing my problem here as long as I don't short stuff and set the gain conservatively. For 3, I'm okay with losing headroom at extremes, unless it's causing my issue. With regards to your 4th point and loading the output less, how would I go about doing that? Are there any resources on improving bootstrapping you could point me toward? Thanks for your help.
@winny Thanks for your help. I couldn't find any other suitable supplies that could run on 5V and weren't ridiculously expensive. Would doing 4 24V supplies in series be better than doing the 2 +/-24V supplies? What are the potential issues with the split in the supplies?
Sorry to bother again, but would this opamp work? I believe the spec I missed with my original part was the equivalent of "Input voltage range" and since this one is RRIO it's (V–) – 0.2 to (V+) + 0.2
