@VoltageSpike If a given package (not part) name has multiple interpretations (such as my example of VSSOP), then it is ambiguous. If there is only one interpretation of the package, then it isn't ambiguous. What I am looking for are names to use in my footprint library that aren't going to be subject to interpretation...

@bruceabbott Thank you for the insight. If you don't mind me asking, how did you arrive at 5.5V for the motor generator voltage in your simulations, or did you just try many different voltages and the one that matched my traces the best?

to answer your question about how I was able to measure the various parameters simultaneously, I have used 100MHz differential scope probes on all signals except input PWM. I know that the negative terminals of normal probes are all tied.

I see your point now about how alternating Q2/Q3 and Q1/Q4 will help with bootstrap charging, in that it will alternately force the sources of Q2 & Q4 to ground, allowing the caps to charge. It's not that complimentary drive is necessary, per se, but it a side effect of it is that it high-side FETs sources are forced to ground (plus Vds of the low side FETs) whenever they are off. Thank you for your help.

All signals are measured relative to ground unless otherwise stated. So, Vds is the drain-source voltage, but Vs is just the source voltage relative to ground. I have included Vs because it affects the charging of the bootstrap capacitors. (see Bruce Abbot's answer below).

Re diodes on gate circuits: they are present to prevent AHS & BHS from dropping below ground due to motor generation and inductance. They protect the pins on HIP4081 and are recommended in the datasheet.

Re Q2/Q3 on together in "on" portion of PWM, Q1/Q4 on together in "off" portion: This is so that at fast PWM frequencies 50% duty cycle leaves shaft stationary, and varying away from 50% on either side increases motor speed to full in either direction. This is the implementation recommended in the HIP4081 datasheet. It will result in circulating current at zero shaft speed, but this can be reduced by increasing PWM frequency, and disabling driver when not in use. Is this a bad idea?

Re grounds: Vmot_ret and GND are connected, but it is not shown in this schematic; I neglected to show that when I stripped out the unnecessary features (connectors, etc.) from the schematic for this question. There is another board that stacks on top of this one that makes the connection, but inserts a small sense resistor between to allow for motor current measurement. I have added a note to this schematic to this effect.

Thank you for your response. This makes sense now that you have explained it. I'm a little uncertain about your proposed remedy, as driving both Q3 & Q4 would lead to shoot through, shorting the motor supply, no? The HIP4081 won't allow both Q3 & Q4 to be driven at the same time, either, but perhaps I'm misunderstanding. If I were to drive both sides (high signal on both CCW_PWM & CW_PWM), what the HIP4081 would do is turn on Q2 & Q4, but perhaps this is actually what you intend, as this would short the motor terminals and bring both to ground, allowing the caps to charge?

The HIP4081 inserts deadtime (set by R1 & R2); shoot through is not happening. There is common ground between the driver and the bridge (Vmot_ret is connected to gnd). The bootstrap caps recharge during the Q2 & Q3 off period - if anything they caps are oversized (measured droop < 1V), recharge in ~0.2uS. When Q2 & Q3 are off, the body diodes of Q1 & Q4 conduct for free wheeling (half bridge drive). What I'm seeing is due to motor generation during decel because if I lock the shaft it disappears. It's my intention to use complimentary PWM, so I will try that and report back.