ADC SAR missing codes

Question

I at the moment using the LTC2364-16 ADC. I notice some linearity issues in my application for specific ranges of the ADC conversion. I have a sine wave as my ADC input. The linearity issues can be seen in the attached images (the results are converted to decimal, meaning 2.5V=65536)

The input window of the ADC is 0 -2.5 V. I am using the LTC6655-2.5V voltage reference to supply the two reference pins of the LTC2364. For the VDD power supply I am using an NCP512-2.5V voltage regulator and the 0VDD is supplied with 3.3V, coming from another board in the system. I have used the stated (in the LTC2364 Datasheet) capacitors to bypass the two reference pins and the supply pins to ground.

In the past I have supplied the reference pins with 3.3V giving an ADC input window 0-3.3V, but the result was exactly the same and I was missing codes in the exact same spots (i.e.: 49300-50000 codes).

I have also connect directly a function generator to the ADC input and the result remain the same. So the problem is not caused by the input circuit.

At the beginning I assumed that it was due to noise in the reference pins. That was the reason I put the LTC6655-2.5V, but no difference.

The fact also that the conversion does not stuck to a specific code, but there is a fluctuation as can be seen in the second attached image, is not helping me to draw any conclusion of what causing the problem.

I am not sure if you have come across that kind of problems in the past, or if you can suggest me what else I can check.

Answer 1

I had exactly the same problem 35 years ago, when a 25ks/s 12 bit ADC was serious money. Yours may not be due to the same problem, but it's a source of potential problems worth ruling out.

I had crosstalk from some of the data output lines to the analogue input, due to a poor layout. The ADC ground shared a ground badly between the data latches and the input sample and hold. The symptom was that for a slowly changing input signal, the output code 'stuck' at particular codes.

Crawl all over your input and output lines, checking for capacitive coupling, and their ground return paths checking for common ground coupling.

A simpler and more trustworthy test source than a function generator is a large capacitor, shunted by a resistor, connected directly to the ADC input and its respective ground or -input. After charging, the discharge will give a smooth ramp, with no extraneous currents to anywhere else in the circuit.

Answer 2

I think there is a clue in the datasheet that may, or may not, be your problem.

Snip from page 14: The LTC2364-16 automatically powers down after a conversion has been completed and powers up once a new conversion is initiated on the rising edge of CNV. During power down, data from the last conversion can be clocked out.

This matches precisely what you are seeing, so I would be looking at the CNV pin to ensure there are no missing conversion start signals, on which the datasheet has this to say:

CNV Timing

The LTC2364-16 conversion is controlled by CNV. A rising edge on CNV will start a conversion and power up the LTC2364-16. Once a conversion has been initiated, it cannot be restarted until the conversion is complete. For optimum performance, CNV should be driven by a clean low jitter signal. Converter status is indicated by the BUSY output which remains high while the conversion is in progress. To ensure that no errors occur in the digitized results, any additional transitions on CNV should occur within 40ns from the start of the conversion or after the conversion has been completed. Once the conversion has completed, the LTC2364-16 powers down and begins acquiring the input signal.

So the signal driving the CNV pin needs some care, apparently, so if this signal is not being recognised as a valid start, the device will not exit power down.

If the device was remaining in power down (for whatever reason), then your results are precisely what you would see.