Below is a circuit build in LTSpice. It is capacitor network simulation.
What is of interest to me is the voltage at node N005. A voltage controlled switch rises the voltage of node N003 to 29.42 Volt as expected from voltage source V1.
In a series capacitor network the voltage is highest at the least capacitance value according to formular:
Vc1 = Q / C1
Vc4 = Q / C4
Vtotal = Vc1 + Vc4.
However, node N005 stays at zero (2 mV) all the time. I would expect a higher voltage at N0005. Even using non ideal capacitors does not change this behaviour. Can you give me a hint why this occurs? Measuring at a real lab experiment shows 26.5 volt at N0005.