There is a design of a circuit proposed in the following way:
simulate this circuit – Schematic created using CircuitLab
The amplifier has a gain of 80, on R1 when the input voltage is equal to 10 V, it will be approximately 41 mV and when amplified by the OP would have 3.3V, which is the maximum volatje of the ADC of an MCU.
Could there be some kind of problem with this design?
The idea of using the voltage divider is to prevent the negative terminal of the voltage source (0 to 10V) from being connected to the ground of the main circuit, ie to isolate it in a certain way.