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I'm designing an adjustable high-voltage low-current power supply using UC3843 control chip.

Basic parameters: Uin = 24 V DC, Uout = 30-1000 V DC, Iout = 10 mA, Uripple < 1 V, fsw = 40 kHz

I have a few questions about one aspect of my desing - the voltage feedback. I most simple cases, the voltage feedback can be realized using a simple resistive divider, possibly with a variable resitor to achieve adjustable output voltage. However, in my case I can't use a potentiometer directly in the divider because of high voltage at the output. Instead of that, I came up with following circuit, which uses 2 op-amps, the first as voltage follower and the second, with variable gain, to achieve desired range of output voltage:

schematic

simulate this circuit – Schematic created using CircuitLab

(In blue are voltages with potentiometer set to low resistance, red is the opposite)

The IC operates in closed loop in order to achieve zero difference at the output of the error amplifier. That means, voltage between R1 and R2 will be in steady state equal to 2.5 V internal reference.

My questions are:

  1. Is there in general something wrong using an op-amp in voltage feedback like this? Are op-amps fast enough to transfer fast changes at the input to the output?
  2. Is op-amp MC33072 suitable for this application?
  3. Should I place some small capacitors for better noise imunity, e.g. across R6?
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  • \$\begingroup\$ Of course you can use a potentiometer directly. What makes you think you cannot. \$\endgroup\$
    – Andy aka
    Commented Nov 19, 2019 at 19:46
  • \$\begingroup\$ It's not safe to use ordinary potentiometer with voltage rating 50 V max in HV application. Any increase in resistance (e.g. due to poor contact) will increase the voltage and possibly destroy the resistive path. \$\endgroup\$
    – simonov
    Commented Nov 19, 2019 at 20:20
  • \$\begingroup\$ You need to show the circuit that makes you think the pot will suffer damage because I don't see that at all. \$\endgroup\$
    – Andy aka
    Commented Nov 19, 2019 at 22:29

2 Answers 2

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  1. Yes and no -- you've identified the biggest potential problem. Typical "general purpose" op-amps are generally fast enough for today's "general purpose" switchers; I'm assuming that your loop will be particularly slow based on the voltage and the UC3843. Basically the bandwidth should be at least ten times the anticipated loop bandwidth of the supply.
  2. I'm too lazy to check for you, but in addition to vetting the bandwidth of the as-built amplifier stages, make sure that it doesn't hit the rails, or suffer from phase inversion or slow recovery when it's common mode range is exceeded. You'll also want to check voltage and current offsets (and the effect of current bias on your unbalanced op-amp inputs)
  3. Probably not. In general a capacitor across R6 would be a Bad Thing -- it would slow down the loop, and potentially destabilize it. If you get close to production and you have really high-frequency noise getting into the system, then a cap across R6 that's small enough not to compromise loop stability may be necessary, but I'd consider that a desperate measure, to fix a problem that's usually better dealt with by careful board layout.
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Using an op-amp in the feedback can work.
It has two drawbacks though.
1) The output voltage will vary non-linearly with the value of R4 (the variable resistor). This means that your adjustment resolution will vary across the range of output voltages.
2) Also you do need to factor in the bandwidth of the op-amp because it becomes part of the feedback path.

I would not advise a capacitor across R6. It will create additional phase lag that could cause instability.

Here is an alternative approach that avoids both those problems.

For a fixed output, the resistor divider connects between the output, the feedback voltage, and ground. To make the output variable, just replace the ground connection on the divider with a DAC output. The output will then vary linearly with the DAC value across the whole output range.

schematic

simulate this circuit – Schematic created using CircuitLab
In general the output voltage will be...

VFB * (1 + R1/ R2) - V_DAC * R1/R2

Note that when V_DAC is 0V the output is VFB * (1 + R1/ R2) as in the normal case.

The advantages of this approach are...
1) You didn't add any phase lag to the control loop.
2) The output voltage varies linearly with the DAC setting so you get consistent resolution.
3) Compared to using digital potentiometers (assuming you were not using a mechanical one) DACs can have much more resolution and accuracy.

Of course you could replace the DAC with a potentiometer (digital or mechanical) buffered by an op-amp and achieve a similar effect. The main point is to adjust the ground reference for the divider rather than the divider gain.

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