Discrete LDO Drawbacks

Question

Clarification:

I appreciate everyone's input so far. The alternatives suggested are interesting, but for this application none of them seem better than the one presented here (except possibly switching M1 with a pnp). What I'm really looking for here is pitfalls with this circuit, rather than alternatives (for example, testing oscillation, input transients, output transients).

End clarification

I'm working on a relatively low power system (10's-100's of mW) that needs to operate from around 1.5V to 12V input. The current system can operate between 1.1V to 5V, but voltages higher than that will damage it. To be clear, it will use up to 100's of mW at both 1.1V and 5V. I've been having trouble finding an LDO thats small and also can handle such low input voltages, so I was wondering what the pitfalls were of just making a discrete one as shown below. The accuracy of the output regulation is unimportant, as long as it doesn't reach 5V. Assume the power dissipation of the mosfet is unimportant for now. It seems to work pretty well in spice. Currently I'm focusing on the DMP1081UCB4 datasheet here.

^{simulate this circuit – Schematic created using CircuitLab}

There is some oscillation caused by the added base capacitance (5n at the moment), but this is probably acceptable for this application (although removing it would be good). The overshoot is also ok.

Green is the voltage output, blue going high represents the load switching from 3mA to 300mA, at 12Vin (which switches on at 1ms).

This is the same situation, except going from 0.3mA to 170mA (which is a more reasonable approximation of the load).

Answer 1

The pfet/pnp acting in common emitter mode has a high impedance node which acts with the regulator's load at low load currents (high impedance load) to create an additional low frequency pole which has the potential to cause instability. A capacitor which has an ESR within a particular range is added across the output to add a zero to the loop which cancels out the extra low frequency pole and creates stability. with low impedance loads (high load currents) the extra pole moves up in frequency and makes the regulator more stable.

Answer 2

The circuit below was developed by me in about 2001.
I have used thousands of the FET based version of the circuit.
The circuit shown is a subset of the final design as current limiting was added but as-is it will work well.
It will be seen that the circuit is close to identical to your one.

See the long discussions in the links I provided.
It has no significant problems.
It can be used as a switcher or as a linear version.
The pass transistor passes voltage through with minimal drop (Vsat for bipolar, Rdson series R for FET version), and transitions smoothly with no drama into switching mode or linear regulation when Vin > Vreg.

Information in the references cited below may be of assistance. I'll not repeat the content here except to show that the circuitry is essentially identical to yours - with an important and optional difference (add an inductor and you get a smps) - leave the inductor out and it's a linear regulator.

Have a look at both the circuits in "4. Even Cheaper" in my 2015 SE Answer here
Peer Review of Buck Converter - you'll find the circuits extremely familiar!

Bipolar only. Remove D1 & L1 and it is functionally identical to your circuit - and works accordingly. Add the diode and inductor to your circuit and it's 'a switcher'.
The added gate drive resistor and zener in my FET based version allows very high input voltage in my application (from below Vreg - where it acts as a pass through - to in excess of 200V).

For either version shown below transition from pass through to switching is very smooth - making it ideal for your application. Below Vregulated the circuit acts as a linear pass through with minimal voltage drop. Above Vregulated switching action starts.

Bipolar driving FET.
Same comments re inductor and diode apply.
Look familiar ? :-)

Also, the 2004 discussion of the 2nd circuit there in this extensive discussion of "my" God's switching regulator*

If after reading that reference (long :-) ) you want to know why I called it by that name feel free to ask offlist :-).

Answer 3

Use a depletion mode FET to limit the voltage available,

^{simulate this circuit – Schematic created using CircuitLab}

When the FET's threshold voltage is reached it will pinch off output giving a crude form of voltage regulation.

^{simulate this circuit}

This arrangement seem to limit at about 2.4V with only a small fraction of a volt drop-out.

if you need a little more voltage you can jack he base up a bit.

^{simulate this circuit}

source regulation is pretty good. load regulation is so-so, so put a big capacitor on the output side to reduce ripple caused by load changes.